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TMS320C6472EZTZA Datasheet(PDF) 7 Page - Texas Instruments |
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TMS320C6472EZTZA Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 269 page  TMS320C6472 www.ti.com SPRS612G – JUNE 2009 – REVISED JULY 2011 2 Device Overview NOTE Unless otherwise noted, all address locations in this document are stated in hexidecimal numbers. 2.1 Device Characteristics Table 2-1, provides an overview of the C6472 DSP. The table shows significant features of the C6472 device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. Table 2-1. Characteristics of the C6472 Processor HARDWARE FEATURES C6472 DDR2 Memory Controller (32-bit bus width) [1.8 V I/O] 1 (clock source = CLKIN3) EDMA (64 independent channels) 1 High-speed Serial RapidIO Port 2 I2C 1 Peripherals HPI (16 bit) 1 Not all peripheral pins are Telecom Serial Interface Port (TSIP) 3 available at the same time (for more detail, see UTOPIA (16/8-bit mode, 50-MHz, slave-only) 1 Section 3). 10/100/1000 Mb/s Ethernet MAC (EMAC) 2 Management Data Input/Output (MDIO) 1 12 (6 dedicated [0-5], 1 per core; 6 shared [6-11]) 64-bit Timers (Configurable) 1 64-bit or 2 32-bit or WD each General-Purpose Input/Output Port (GPIO) 16 32K-Byte L1 Program Memory [SRAM/Cache] Organization per C64x+ Megamodule 32K-Byte L1 Data Memory [SRAM/Cache] 608K-Byte L2 Unified Memory [SRAM/Cache] On-Chip Memory 768K-byte SL2 Unified SRAM Shared by all 6 C64x+ Megamodules 768K-byte SL2 ROM CPU MegaModule Revision ID Register (MM_REVID.[15:0]) 0003h Revision ID Address 0181 2000 JTAG ID register JTAG ID 0009 102Fh Address 02A8 0008 Frequency MHz 500/625/700 MHz Cycle Time ns 2 ns/1.6 ns 1.2 V (DDR2 EMIF) Core (V) 1.0 V (500 MHz) / 1.1 V (625 MHz) / 1.2 V (700 MHz) 1.2 V [RapidIO], Voltage 1.5 V/1.8 V [EMAC RGMII], I/O (V) 1.8 V [DDR2 EMIF I/O], and 1.8 V and 3.3 V [I/O Supply Voltage] PLL1 and CLKIN frequency multiplier Bypass (x1), x10-x32 PLL1 Controller Options PLL2 and CLKIN frequency multiplier x20 PLL2 Controller Options [EMAC support] PLL3 and CLKIN frequency multiplier x20 PLL3 Controller Options [DDR2 Memory Controller support only] BGA Package 24 x 24 mm 737-Pin Flip-Chip Plastic BGA (CTZ/ZTZ) Process Technology μm 0.09 μm Copyright © 2009–2011, Texas Instruments Incorporated Device Overview 7 Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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