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GR712RC-MS-CG240 Datasheet(PDF) 11 Page - Aeroflex Circuit Technology |
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GR712RC-MS-CG240 Datasheet(HTML) 11 Page - Aeroflex Circuit Technology |
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11 / 48 page  AEROFLEX GAISLER 11 GR712RC-DS Copyright Aeroflex Gaisler AB February 2013, Issue 2.0 173 SWMX[42] TCRFAVL[2] High In Telecommand RF Available 2 GPIO[39] - In GPIO 2 Register, bit 7 (input only) 172 SWMX[43] - High-Z Out Proprietary, enabled by CAN GPIO[40] - High-Z In/Out GPIO 2 Register, bit 8 SpaceWire clock divisor registers - In At reset, bits 10 and 2 in the clock divisor reg- ister of the SpaceWire interfaces are set from this input 169 SWMX[44] SPICLK High-Z Out SPI Clock SLO - High-Z Out SLINK Data Out GPIO[41] - High-Z In/Out GPIO 2 Register, bit 9 166 SWMX[45] SPIMOSI - High-Z Out SPI Master Out Slave In SLCLK High High-Z Out SLINK Clock GPIO[42] - High-Z In/Out GPIO 2 Register, bit 10 SpaceWire clock divisor registers - In At reset, bits 11 and 3 in the clock divisor reg- ister of the SpaceWire interfaces are set from this input 165 SWMX[46] TCCLK[3] Rising In Telecommand Clock 3 GPIO[43] - In GPIO 2 Register, bit 11 (input only) 164 SWMX[47] TCD[3] - In Telecommand Data 3 GPIO[44] - In GPIO 2 Register, bit 12 (input only) 163 SWMX[48] SDCASN Low High-Z Out SDRAM Column Address Strobe GPIO[45] - High-Z In/Out GPIO 2 Register, bit 13 162 SWMX[49] SDRASN Low High-Z Out SDRAM Row Address Strobe GPIO[46] - High-Z In/Out GPIO 2 Register, bit 14 161 SWMX[50] TCACT[3] High In Telecommand Active 3 GPIO[47] - In GPIO 2 Register, bit 15 (input only) 160 SWMX[51] SPIMISO In SPI Master In Slave Out TCRFAVL[3] High In Telecommand RF Available 3 SLI - In SLINK Data In GPIO[48] - In GPIO 2 Register, bit 16 (input only) 157 SWMX[52] SDWEN Low High-Z Out SDRAM Write Enable GPIO[49] - High-Z In/Out GPIO 2 Register, bit 17 155 SWMX[53] SDDQM[2] High High-Z Out SDRAM Data Mask 2, corresponds to DATA[23:16] GPIO[50] - High-Z In/Out GPIO 2 Register, bit 18 154 SWMX[54] SDDQM[3] High High-Z Out SDRAM Data Mask 3, corresponds to DATA[31:24] GPIO[51] - High-Z In/Out GPIO 2 Register, bit 19 153 SWMX[55] TCACT[4] High In Telecommand Active 4 GPIO[52] - In GPIO 2 Register, bit 20 (input only) 144 SWMX[56] TCRFAVL[4] High In Telecommand RF Available 4 GPIO[53] - In GPIO 2 Register, bit 21 (input only) 143 SWMX[57] I2CSDA High-Z In/Out I2C Serial Data GPIO[54] - High-Z In/Out GPIO 2 Register, bit 22 TCCLK[4] Rising In Telecommand Clock 4 142 SWMX[58] I2CSCL High-Z In/Out I2C Serial Clock GPIO[55] - High-Z In/Out GPIO 2 Register, bit 23 TCD[4] - In Telecommand Data 4 Table 3. I/O switch matrix pin description, defining the order of priority for outputs and input/outputs, with the highest priority for each pin listed first. Pin no. Pin name Pin function Polarity Reset value Dir. Description |
Similar Part No. - GR712RC-MS-CG240 |
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Similar Description - GR712RC-MS-CG240 |
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