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DCTPACKAGE

(TOP VIEW)

DCUPACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOMVIEW)

1

V

CC

8

1OE

2

7

1A

2OE

3

6

2Y

1Y

4

5

GND

2A

3

6

1Y

2Y

8

1

V

CC

1OE

5

GND

4

2A

2

7

2OE

1A

GND

5

4

2A

3 6

1Y

2Y

2 7

2OE

1A

8

V

CC

1

1OE

DESCRIPTION/ORDERING INFORMATION

SN74LVC2G126

DUAL BUS BUFFER GATE

WITH 3-STATE OUTPUTS

SCES205J – APRIL 1999 – REVISED JANUARY 2007

• Available in the Texas Instruments

• I

NanoFree™ Package

Operation

• Supports 5-V V

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• Inputs Accept Voltages to 5.5 V

• ESD Protection Exceeds JESD 22

• Max t

–

2000-V Human-Body Model (A114-A)

• Low Power Consumption, 10-µA Max I

CC

–

200-V Machine Model (A115-A)

• ±24-mA Output Drive at 3.3 V

–

1000-V Charged-Device Model (C101)

• Typical V

<0.8 V at V

• Typical V

>2 V at V

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the

associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a

pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the

driver.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC2G126YZPR

_ _ _CN_

0.23-mm Large Bump – YZP (Pb-free)

SSOP – DCT

Reel of 3000

SN74LVC2G126DCTR

C26_ _ _

–40

°C to 85°C

Reel of 3000

SN74LVC2G126DCUR

VSSOP – DCU

C26_

Reel of 250

SN74LVC2G126DCUT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.