Lens Dist

Face Det

IPIPE

Resizer

ISIF

Video FE

3Ch

DAC

Video

Encoder

OSD

Video BE

SDTV

Analog Video

Digital

RGB/YUV

Camera

AFE

VPSS

DDR2

Controller

EDMA

NAND/SM

Memory

I/F

HPI

16-Bit

DDR2

NAND/

OneNAND/

NOR Flash,

SmartMedia/

xD

Host CPU

16 Bit

8/16 Bit

16 Bit

USB2.0 HS w/OTG

MMC/SD (x2)

SPI (x5)

UART (x2)

I2C

Timer (x4-64b)

WDT (x1-64b)

GIO

PWM (x4)

RTO

McBSP

EMAC

ADC

Key Scan

Voice Codec

System

I/O

Interface

I-Cache

16 KB

D-Cache

8 KB

RAM

32 KB

ROM

16 KB

ARM926EJ-S

ARM INTC

PRTCSS

CLOCK Ctrl

PLL

JTAG

I/F

HDVICP

MJCP

DMA/Data and Configuration Bus

19.2 MHz, 24 MHz

27 MHz or 36 MHz

32.768

kHz

PMIC/

SW

3A

NOISE FILTERING

ENGINE

TMS320DM369

SPRT666 – APRIL 2013

www.ti.com

1.3

Functional Block Diagram

Figure 1-1 shows the functional block diagram of the TMS320DM369 device.

Figure 1-1. Functional Block Diagram

4

TMS320DM369 Digital Media System-on-Chip (DMSoC)

Copyright © 2013, Texas Instruments Incorporated

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