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74HCT4066N Datasheet(PDF) 4 Page - NXP Semiconductors |
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74HCT4066N Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 25 page 74HC_HCT4066 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 2 April 2013 4 of 25 NXP Semiconductors 74HC4066; 74HCT4066 Quad single-pole single-throw analog switch 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level. 7. Limiting values [1] To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND. [2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C. For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C. Table 3. Function table[1] Input nE Switch LOFF HON Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +11.0 V IIK input clamping current VI < 0.5 V or VI >VCC +0.5 V - 20 mA ISK switch clamping current VSW < 0.5 V or VSW >VCC +0.5 V - 20 mA ISW switch current VSW = 0.5 V to VCC +0.5 V [1] - 25 mA ICC supply current - 50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C [2] DIP14 package - 750 SO14, (T)SSOP14 and DHVQFN14 packages -500 P power dissipation per switch - 100 mW |
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