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74LVC2G17GF Datasheet(PDF) 7 Page - NXP Semiconductors |
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74LVC2G17GF Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 19 page 74LVC2G17 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 8 — 2 May 2013 7 of 19 NXP Semiconductors 74LVC2G17 Dual non-inverting Schmitt trigger with 5 V tolerant input Table 9. Measurement points Supply voltage Input Output VCC VM VM 1.65 V to 1.95 V 0.5 V CC 0.5 V CC 2.3 V to 2.7 V 0.5 V CC 0.5 V CC 2.7V 1.5V 1.5V 3.0Vto 3.6V 1.5V 1.5V 4.5 V to 5.5 V 0.5 V CC 0.5 V CC Measurement points are given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 8. Test circuit for measuring switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 10. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPLH, tPHL 1.65 V to 1.95 V VCC 2.0ns 30pF 1k open 2.3 V to 2.7 V VCC 2.0ns 30pF 500 open 2.7V 2.7V 2.5ns 50pF 500 open 3.0Vto 3.6V 2.7V 2.5ns 50pF 500 open 4.5 V to 5.5 V VCC 2.5ns 50pF 500 open |
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