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OMAP3515 Datasheet(PDF) 2 Page - Texas Instruments |
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OMAP3515 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 264 page OMAP3515/03 Applications Processor SPRS505F – FEBRUARY 2008 – REVISED SEPTEMBER 2009 www.ti.com • Resize Images From 1/4x to 4x – SmartReflex™ Technology • Separate Horizontal/Vertical Control – Dynamic Voltage and Frequency Scaling (DVFS) • Display Subsystem • Test Interfaces – Parallel Digital Output – IEEE-1149.1 (JTAG) Boundary-Scan • Up to 24-Bit RGB Compatible • HD Maximum Resolution – Embedded Trace Macro Interface (ETM) • Supports Up to 2 LCD Panels – Serial Data Transport Interface (SDTI) • Support for Remote Frame Buffer • 12 32-bit General Purpose Timers Interface (RFBI) LCD Panels – 2 10-Bit Digital-to-Analog Converters • 2 32-bit Watchdog Timers (DACs) Supporting: • 1 32-bit 32-kHz Sync Timer • Composite NTSC/PAL Video • Up to 188 General-Purpose I/O (GPIO) Pins • Luma/Chroma Separate Video (S-Video) (Multiplexed With Other Device Functions) – Rotation 90-, 180-, and 270-degrees • 65-nm CMOS Technology – Resize Images From 1/4x to 8x • Package-On-Package (POP) Implementation – Color Space Converter for Memory Stacking (Not Available in CUS – 8-bit Alpha Blending Package) • Serial Communication • Discrete Memory Interface (Not Available in – 5 Multichannel Buffered Serial Ports CBC Package) (McBSPs) • Packages: • 512 Byte Transmit/Receive Buffer – 515-pin s-PBGA package (CBB Suffix), (McBSP1/3/4/5) .5mm Ball Pitch (Top), .4mm Ball Pitch • 5K-Byte Transmit/Receive Buffer (Bottom) (McBSP2) – 515-pin s-PBGA package (CBC Suffix), • SIDETONE Core Support (McBSP2 and 3 .65mm Ball Pitch (Top), .5mm Ball Pitch Only) For Filter, Gain, and Mix (Bottom) Operations – 423-pin s-PBGA package (CUS Suffix), • Direct Interface to I2S and PCM Device .65mm Ball Pitch and TDM Buses • 1.8-V I/O and 3.0-V (MMC1 only), • 128 Channel Transmit/Receive Mode 0.985-V to 1.35-V Adaptive Processor Core – Four Master/Slave Multichannel Serial Port Voltage Interface (McSPI) Ports 0.985-V to 1.35-V Adaptive Core Logic Voltage – High-Speed/Full-Speed/Low-Speed USB Note: These are default Operating OTG Subsystem (12-/8-Pin ULPI Interface) Performance Point (OPP) voltages and could – High-Speed/Full-Speed/Low-Speed be optimized to lower values using Multiport USB Host Subsystem SmartReflex™ AVS. • 12-/8-Pin ULPI Interface or 6-/4-/3-Pin Serial Interface • Applications: • Supports Transceiverless Link Logic – Portable Navigation Devices (TLL) – Portable Media Player – One HDQ/1-Wire Interface – Advanced Portable Consumer Electronics – Three UARTs (One with Infrared Data – Digital TV Association [IrDA] and Consumer Infrared – Digital Video Camera [CIR] Modes) – Portable Data Collection – Three Master/Slave High-Speed – Point-of-Sale Devices Inter-Integrated Circuit (I2C) Controllers – Gaming • Removable Media Interfaces: – Web Tablet – Three Multimedia Card (MMC)/ Secure – Smart White Goods Digital (SD) With Secure Data I/O (SDIO) – Smart Home Controllers • Comprehensive Power, Reset, and Clock – Ultra Mobile Devices Management 2 OMAP3515/03 Applications Processor Submit Documentation Feedback |
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