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TPS40130RHBRG4 Datasheet(PDF) 7 Page - Texas Instruments |
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TPS40130RHBRG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 39 page www.ti.com 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 LDRV1 VIN5 SW1 HDRV1 BOOT1 OVSET VOUT GSNS DIFFO CS1 CSRT1 COMP VREF DROOP FB PGND LDRV2 SW2 HDRV2 BOOT2 SS UVLO BP5 AGND CS2 CSRT2 RT PGOOD ILIM EN/SYNC DBT PACKAGE (TOP VIEW) RHB PACKAGE (TOP VIEW) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 9 10 11 12 13 15 16 BOOT1 OVSET VOUT GSNS DIFFO CS1 CSRT1 NC NC BOOT2 SS UVLO BP5 AGND CS2 CSRT2 14 1 2 3 4 5 6 7 8 TPS40130 SLUS602B – JUNE 2004 – REVISED SEPTEMBER 2005 Terminal Functions TERMINAL I/O DESCRIPTION NO. NAME RHB DBT AGND 19 22 - Low noise ground connection to the device. Provides a bootstrapped supply for the high-side FET driver for PWM1, enabling the gate of the BOOT1 1 5 I high-side FET to be driven above the input supply rail. Connect a capacitor from this pin to SW1 pin and a Schottky diode from this pin to VIN5. Provides a bootstrapped supply for the high-side FET driver for PWM2, enabling the gate of the BOOT2 23 26 I high-side FET to be driven above the input supply rail. Connect a capacitor from this pin to SW2 pin and a Schottky diode from this pin to VIN5. Filtered input from the VIN5 pin. A 10- Ω resistor should be connected between VIN5 and BP5 and a BP5 20 23 O 1.0-µF ceramic capacitor should be connected from this pin to ground. COMP 9 12 O Output of the error amplifier. The voltage at this pin determines the duty cycle for the PWM. CS1 6 10 I These pins are used to sense the inductor phase current. Inductor current can be sensed with an external current sense resistor or by using an external R-C circuit and the inductor's DC resistance. The traces for these signals must be connected directly at the current sense element. See Layout Guidelines for more information. After the device is enabled and prior to the device starting (during the first 32 clock cycles), a 5-µA current flows out of these pins. The current flows through the external CS2 18 21 I components: current sense resistor, RCS, the output inductor and the output capacitor(s) to ground. If the voltage on the CS1, and CS2 pins exceed 0.2 V (resistance greater than 40 k Ω), a fault is declared and the device does not start. This is a fault detection feature that insures the output inductor, current sense resistor and output capacitors are installed properly on the board. CSRT1 7 11 O Return point of current sense voltage. The traces for these signals must be connected directly at the current sense element. See Layout Guidelines for more information. CSRT2 17 20 O Output of the differential amplifier. The voltage at this pin represents the true output voltage without IR DIFFO 5 9 O drops that result from high-current in the PCB traces. The VOUT and GSNS pins must be connected directly at the point of load where regulation is required. See Layout Guidelines for more information. This is the input to the non-inverting input of the Error Amplifier. This pin is normally connected to the VREF pin and is the voltage that the feedback loop regulates to. This pin is also used to program DROOP 11 14 I droop function. A resistor between this pin and the VREF pin sets the desired droop value. The value of the DROOP resistor is described in Equation 22. A logic high signal on this input enables the controller operation. A pulsing signal to this pin EN/SYNC 13 16 I synchronizes the rising edge of SW to the falling edge of an external clock source. These pulses must be greater than 8.2 times the free running frequency of the main oscillator set by the RT resistor. 7 Submit Documentation Feedback |
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