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SPT7734SCS Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part # SPT7734SCS
Description  8-BIT, 40 MSPS,175 mW A/D CONVERTER
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

SPT7734SCS Datasheet(HTML) 1 Page - Fairchild Semiconductor

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SPT7734
8-BIT, 40 MSPS,175 mW A/D CONVERTER
FEATURES
• Monolithic 40 MSPS Converter
• 175 mW Power Dissipation
• On-Chip Track-and-Hold
• Single +5 V Power Supply
• TTL/CMOS Outputs
• 5 pF Input Capacitance
• Low Cost
• Tri-State Output Buffers
• High ESD Protection: 3,500 V Minimum
• Selectable +3 V or +5 V Logic I/O
APPLICATIONS
• All High-Speed Applications Where
Low Power Dissipation is Required
• Video Imaging
• Medical Imaging
• Radar Receivers
• IR Imaging
• Digital Communications
GENERAL DESCRIPTION
The SPT7734 is a 8-bit monolithic, low cost, ultralow power
analog-to-digital converter capable of minimum word rates
of 40 MSPS. The on-chip track-and-hold function assures
very good dynamic performance without the need for exter-
nal components. The input drive requirements are mini-
mized due to the SPT7734's low input capacitance of only
5 pF.
Power dissipation is extremely low at only 175 mW typical at
40 MSPS with a power supply of +5.0 V. The digital outputs
are +3 V or +5 V, and are user selectable. The SPT7734 has
incorporated proprietary circuit design and CMOS process-
ing technologies to achieve its advanced performance. In-
puts and outputs are TTL/CMOS compatible to interface with
TTL/CMOS logic systems. Output data format is straight
binary.
The SPT7734 is available in 28-lead SOIC and 32-lead small
(7 mm square) TQFP packages over the commercial tem-
perature range.
..
.
9-Bit
SAR
DAC
ADC Section 1
T/H
9
9-Bit
SAR
DAC
ADC Section 16
Auto-
Zero
CMP
Auto-
Zero
CMP
T/H
9
VREF
1:16
Mux
.
.
.
9
9
9
9
9-Bit
16:1
Mux/
Error
Correction
Timing
and
Control
P1
P2
P15
P16
ADC Section 2
ADC Section 15
.
.
.
Reference Ladder
Ref
In
Enable
CLK In
Data
Vali
d
AIN
.
.
.
D8 Overrange
D7 (MSB)
D6
D5
D4
D3
D2
D1
DØ (LSB)
BLOCK DIAGRAM


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