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SPT7853 Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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SPT7853 Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 10 page 4 12/14/99 SPT7853 4 ANALOG IN CLOCK IN SAMPLING CLOCK DIGITAL OUT DATA VALID 12345678910 11 12 13 14 15 16 17 (Internal) VALID INVALID 5 6 7 1 2 3 8 9 10 11 Figure 1a – Timing Diagram 1 Figure 1b – Timing Diagram 2 Table I – Timing Parameters Description Parameters Min Typ Max Units Conversion time tC 2 x tCLK nS Clock period tCLK 16.67 nS Clock duty cycle 45 50 55 % Clock to output delay (15 pF load) tOD 19 nS DAV pulse width tDAV tCLK nS Clock to DAV tD 6.5 nS DATA VALID DATA OUTPUT DA, DB, DC CLOCK IN tOD tS Data 0 Data 1 Data 2 tC tCH tCL tCLK tDAV tDAV |
Similar Part No. - SPT7853 |
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Similar Description - SPT7853 |
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