UCC2946

UCC3946

SLUS247F − APRIL 1997 − REVISED NOVEMBER 2007

MICROPROCESSOR SUPERVISOR

WITH WATCHDOG TIMER

1

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FEATURES

DESCRIPTION

The UCCx946 is designed to provide accurate

microprocessor supervision, including reset and

watchdog functions. During power up, the device

asserts a reset signal RES with VDD as low as 1 V.

The reset signal remains asserted until the VDD

voltage rises and remains above the reset

threshold for the reset period. Both reset threshold

and reset period are programmable by the user.

The UCCx946 is also resistant to glitches on the

VDD line. Once RES has been deasserted, any

drops below the threshold voltage need to be of

certain time duration and voltage magnitude to

generate a reset signal. These values are shown

in Figure 1. An I/O line of the microprocessor may

be tied to the watchdog input (WDI) for watchdog

functions. If the I/O line is not toggled within a set

watchdog period, programmable by the user,

WDO is asserted. The watchdog function is

disabled during reset conditions.

The UCCx946 is available in 8-pin SOIC(D), 8-pin

PDIP (N) and 8-pin TSSOP(PW) packages to

optimize board space.

UDG−02192

6

7

WDI

WP

8

VDD

3

5

POWER TO

CIRCUITRY

A3

A2

A1

A0

CLK

CLR

8−BIT

COUNTER

400 nA

WDO

GND

EDGE DETECT

WATCHDOG

TIMING

100 mV

1.235 V

2

RTH

4

RP

400 nA

POWER ON RESET

RES

+

+

S

Q

Q

R

S

Q

QR

SQ

Q

R

1

1.235 V

+

+

+

+

+

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

 2007, Texas Instruments Incorporated