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TLV71330PDBVR Datasheet(PDF) 2 Page - Texas Instruments

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Part # TLV71330PDBVR
Description  Capacitor-Free, 150-mA, Low-Dropout Regulator
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TLV71330PDBVR Datasheet(HTML) 2 Page - Texas Instruments

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TLV713
TLV713P
SBVS195D – SEPTEMBER 2012 – REVISED JULY 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)(2)
PRODUCT
VOUT
XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two digits are used
in the ordering number; otherwise, three digits are used (for example, 28 = 2.8 V; 475 = 4.75 V).
TLV713xx(x)Pyyyz
P is optional; devices with P have an LDO regulator with an active output discharge.
YYY is the package designator.
Z is the package quantity. R is for reel (3000 pieces), T is for tape (250 pieces).
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
(2)
Output voltages from 1.0 V to 3.3 V in 50-mV increments are available. Contact the factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
(1)
At TJ = +25°C, unless otherwise noted. All voltages are with respect to GND.
VALUE
MIN
MAX
UNIT
Input range, VIN
–0.3
6.0
V
Voltage
Enable range, VEN
–0.3
VIN + 0.3
V
Output range, VOUT
–0.3
6.0
V
Current
Maximum output, IOUT
Internally limited
Output short-circuit duration
Indefinite
Total power dissipation
Continuous, PDISS
See Thermal Information table
Junction range, TJ
–55
+85
°C
Temperature
Storage junction range, Tstg
–55
+150
°C
Human body model (HBM)
2000
V
Electrostatic discharge (ESD) ratings
Charged device model (CDM)
500
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-
maximum rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TLV713xx
TLV713xxP
THERMAL METRIC(1)
UNITS
DQN (X2SON)
DBV (SOT23)
4 PINS
5 PINS
θJA
Junction-to-ambient thermal resistance
255.8
213.1
θJC(top)
Junction-to-case(top) thermal resistance
159.3
110.9
θJB
Junction-to-board thermal resistance
208.2
97.4
°C/W
ψJT
Junction-to-top characterization parameter
16.2
22.0
ψJB
Junction-to-board characterization parameter
208.1
78.4
θJC(bottom)
Junction-to-case(bottom) thermal resistance
148.6
n/a
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TLV713 TLV713P


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