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LT1815 Datasheet(PDF) 10 Page - Linear Technology |
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LT1815 Datasheet(HTML) 10 Page - Linear Technology |
10 / 16 page LTC6400-14 10 640014fb BLOCK DIAGRAM PIN FUNCTIONS V+ (Pins 1, 3, 10): Positive Power Supply (Normally tied to 3V or 3.3V). All three pins must be tied to the same voltage. Bypass each pin with 1000pF and 0.1μF capacitors as close to the pins as possible. VOCM (Pin 2): This pin sets the output common mode voltage. A 0.1μF external bypass capacitor is recom- mended. V– (Pins 4, 9, 12, 17): Negative Power Supply (GND). All four pins must be connected to same voltage/ground. –OUT, +OUT (Pins 5, 8): Unfiltered Outputs. These pins have series resistors, ROUT 12.5Ω. –OUTF, +OUTF (Pins 6, 7): Filtered Outputs. These pins have 50 Ω series resistors and a 2.7pF shunt capacitor. ENABLE (Pin 11): This pin is a logic input referenced to VEE. If low, the part is enabled. If high, the part is disabled and draws approximately 1mA supply current. +IN (Pins 13, 14): Positive Input. Pins 13 and 14 are internally shorted together. –IN (Pins 15, 16): Negative Input. Pins 15 and 16 are internally shorted together. Exposed Pad (Pin 17): V–. The Exposed Pad must be connected to same voltage/ground as pins 4, 9, 12. 13 640014 BD 1 V+ 2 VOCM 14 7 15 +OUT +OUTF –OUTF –OUT +IN IN+ OUT– IN– OUT+ +IN –IN –IN 5 16 RG 100Ω ROUT 12.5Ω RF 500Ω RG 100Ω 2k RF 500Ω 6 4 V– 3 V+ 12 V– 11 ENABLE 9 V– 10 V+ COMMON MODE CONTROL BIAS CONTROL 8 ROUT 12.5Ω RFILT 50Ω RFILT 50Ω CFILT 2.7pF 5.3pF |
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