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ADM1184 Datasheet(PDF) 5 Page - Analog Devices |
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ADM1184 Datasheet(HTML) 5 Page - Analog Devices |
5 / 12 page ADM1184 Rev. 0 | Page 5 of 12 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS GND 1 VIN1 2 VIN2 3 VIN3 4 VIN4 5 VCC 10 OUT1 9 OUT2 8 OUT3 7 PWRGD 6 ADM1184 TOP VIEW (Not to Scale) Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 GND Chip Ground Pin. 2 VIN1 Noninverting Input of Comparator 1. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. 3 VIN2 Noninverting Input of Comparator 2. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. 4 VIN3 Noninverting Input of Comparator 3. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. 5 VIN4 Noninverting Input of Comparator 4. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. 6 PWRGD Active High, Open-Drain Output. When the voltage on each VINx input exceeds 0.6 V, PWRGD is asserted after a 190 ms delay. Once PWRGD has been asserted, if the voltage monitored by VIN1, VIN2, VIN3, or VIN4 falls below 0.6 V, the PWRGD output is deasserted immediately. 7 OUT3 Active High, Open-Drain Output. When the voltage on VIN3 exceeds 0.6 V, OUT3 is asserted. OUT3 remains asserted until the voltage monitored by VIN3 falls below 0.6 V, and then it is driven low. 8 OUT2 Active High, Open-Drain Output. When the voltage on VIN2 exceeds 0.6 V, OUT2 is asserted. OUT2 remains asserted until the voltage monitored by VIN2 falls below 0.6 V, and then it is driven low. 9 OUT1 Active High, Open-Drain Output. When the voltage on VIN1 exceeds 0.6 V, OUT1 is asserted. OUT1 remains asserted until the voltage monitored by VIN1 falls below 0.6 V, and then it is driven low. 10 VCC Positive Supply Input Pin. The operating supply voltage range is 2.7 V to 5.5 V. |
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