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TOP255PN Datasheet(PDF) 9 Page - Power Integrations, Inc. |
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TOP255PN Datasheet(HTML) 9 Page - Power Integrations, Inc. |
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9 / 48 page  Rev. F 01/09 9 TOP252-262 www.powerint.com Figure 10. Switching Frequency Jitter (Idealized V DRAIN Waveforms). f OSC - 4 ms Time Switching Frequency V DRAIN f OSC + (half frequency), which may be preferable in some cases such as noise sensitive video applications or a high efficiency standby mode. Otherwise, the FREQUENCY pin should be connected to the SOURCE pin for the default 132 kHz. In the M, P and G packages and the TOP259-261 Y package option, the full frequency PWM mode is set at 66 kHz, for higher efficiency and increased output power in all applications. To further reduce the EMI level, the switching frequency in the full frequency PWM mode is jittered (frequency modulated) by approximately ±2.5 kHz for 66 kHz operation or ±5 kHz for 132 kHz operation at a 250 Hz (typical) rate as shown in Figure 10. The jitter is turned off gradually as the system is entering the variable frequency mode with a fixed peak drain current. Pulse Width Modulator The pulse width modulator implements multi-mode control by driving the output MOSFET with a duty cycle inversely proportional to the current into the CONTROL pin that is in excess of the internal supply current of the chip (see Figure 9). The feedback error signal, in the form of the excess current, is filtered by an RC network with a typical corner frequency of 7 kHz to reduce the effect of switching noise in the chip supply current generated by the MOSFET gate driver. To optimize power supply efficiency, four different control modes are implemented. At maximum load, the modulator operates in full frequency PWM mode; as load decreases, the modulator automatically transitions, first to variable frequency PWM mode, then to low frequency PWM mode. At light load, the control operation switches from PWM control to multi-cycle- modulation control, and the modulator operates in multi-cycle- modulation mode. Although different modes operate differently to make transitions between modes smooth, the simple relationship between duty cycle and excess CONTROL pin current shown in Figure 9 is maintained through all three PWM modes. Please see the following sections for the details of the operation of each mode and the transitions between modes. Full Frequency PWM mode: The PWM modulator enters full frequency PWM mode when the CONTROL pin current (I C) reaches I B. In this mode, the average switching frequency is kept constant at f OSC (66 kHz for P, G and M packages and TOP259-261 Y, pin selectable 132 kHz or 66 kHz for Y and E/L packages). Duty cycle is reduced from DC MAX through the reduction of the on-time when I C is increased beyond IB. This operation is identical to the PWM control of all other TOPSwitch families. TOPSwitch-HX only operates in this mode if the cycle- by-cycle peak drain current stays above k PS(UPPER)*ILIMIT(set), where k PS(UPPER) is 55% (typical) and ILIMIT(set) is the current limit externally set via the X or M pin. Variable Frequency PWM mode: When peak drain current is lowered to k PS(UPPER)* ILIMIT(set) as a result of power supply load reduction, the PWM modulator initiates the transition to variable frequency PWM mode, and gradually turns off frequency jitter. In this mode, peak drain current is held constant at k PS(UPPER)* I LIMIT(set) while switching frequency drops from the initial full frequency of f OSC (132 kHz or 66 kHz) towards the minimum frequency of f MCM(MIN) (30 kHz typical). Duty cycle reduction is accomplished by extending the off-time. Low Frequency PWM mode: When switching frequency reaches f MCM(MIN) (30 kHz typical), the PWM modulator starts to transition to low frequency mode. In this mode, switching frequency is held constant at f MCM(MIN) and duty cycle is reduced, similar to the full frequency PWM mode, through the reduction of the on-time. Peak drain current decreases from the initial value of k PS(UPPER)* ILIMIT(set) towards the minimum value of k PS(LOWER)*ILIMIT(set), where kPS(LOWER) is 25% (typical) and ILIMIT(set) is the current limit externally set via the X or M pin. Multi-Cycle-Modulation mode: When peak drain current is lowered to k PS(LOWER)*ILIMIT(set), the modulator transitions to multi- cycle-modulation mode. In this mode, at each turn-on, the modulator enables output switching for a period of T MCM(MIN) at the switching frequency of f MCM(MIN) (4 or 5 consecutive pulses at 30 kHz) with the peak drain current of k PS(LOWER)*ILIMIT(set), and stays off until the CONTROL pin current falls below I C(OFF). This mode of operation not only keeps peak drain current low but also minimizes harmonic frequencies between 6 kHz and 30 kHz. By avoiding transformer resonant frequency this way, all potential transformer audible noises are greatly supressed. Maximum Duty Cycle The maximum duty cycle, DC MAX, is set at a default maximum value of 78% (typical). However, by connecting the VOLTAGE- MONITOR or MULTI-FUNCTION pin (depending on the package) to the rectified DC high voltage bus through a resistor with appropriate value (4 M Ω typical), the maximum duty cycle can be made to decrease from 78% to 40% (typical) when input line voltage increases from 88 V to 380 V, with dual gain slopes. Error Amplifier The shunt regulator can also perform the function of an error amplifier in primary side feedback applications. The shunt regulator voltage is accurately derived from a temperature- compensated bandgap reference. The CONTROL pin dynamic impedance Z C sets the gain of the error amplifier. The CONTROL pin clamps external circuit signals to the V C voltage level. The CONTROL pin current in excess of the supply current is separated by the shunt regulator and becomes the feedback current I fb for the pulse width modulator. |
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