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AD532JHZ Datasheet(PDF) 7 Page - Analog Devices |
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AD532JHZ Datasheet(HTML) 7 Page - Analog Devices |
7 / 17 page AD532 Rev. D | Page 6 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Y1 Y2 VOS GND X2 X1 –VS OUT Z +VS AD532 TOP VIEW (Not to Scale) Figure 3. 10-Lead Header Pin Configuration (H-10) 20 19 1 2 3 18 14 15 16 17 4 5 6 7 8 9 10111213 NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. –VS Y2 NC NC NC VOS NC NC NC GND AD532 TOP VIEW (Not to Scale) Figure 4. 20-Lead Leadless Chip Carrier Pin Configuration (E-20A) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 Z+VS OUT Y1 –VS Y2 NC VOS NC GND NC X2 X1 NC NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. AD532 TOP VIEW (Not to Scale) Figure 5. 14-Lead Side Braize DIP (D-14) Table 3. 10 Lead Header Pin Function Descriptions Pin No. Mnemonic Description 1 Y1 Y Multiplicand Input 1 2 +VS Positive Supply Voltage 3 Z Dual Purpose Input 4 OUT Product Output 5 −VS Negative Supply Voltage 6 X1 X Multiplicand Input 1 7 X2 X Multiplicand Input 2 8 GND Common 9 VOS Output Offset Adjust 10 Y2 Y Multiplicand Input 2 |
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