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AD7538KR Datasheet(PDF) 11 Page - Analog Devices |
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AD7538KR Datasheet(HTML) 11 Page - Analog Devices |
11 / 16 page AD7538 Rev. B | Page 11 of 16 BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION) The recommended circuit diagram for bipolar operation is shown in Figure 8. Offset binary coding is used. The code table for Figure 8 is given in Table 7. With the DAC loaded to 10 0000 0000 0000, adjust R1 for VO = 0 V. Alternatively, one can omit R1 and R2 and adjust the ratio of R5 and R6 for VO = 0 V. Full-scale trimming can be accom- plished by adjusting the amplitude of VIN or by varying the value of R7. The values given for R1, R2 are the minimum necessary to calibrate the system for Resistors R5, R6, R7 ratio matched to 0.1%. System linearity error is independent of resistor ratio matching and is affected by DAC linearity error only. When operating over a wide temperature range, it is important that the resistors be of the same type so that their temperature coefficients match. LOW LEAKAGE CONFIGURATION For CMOS multiplying DAC, as the device is operated at higher temperatures, the output leakage current increases. For a 14-bit resolution system, this can be a significant source of error. The AD7538 features a leakage reduction configuration to keep the leakage current low over an extended temperature range. One may operate the device with or without this configuration. If VSS (Pin 24) is tied to AGND then the DAC exhibits normal output leakage currents at high temperatures. To use the low leakage facility, VSS should be tied to a voltage of approximately −0.3 V as in Figure 6 and Figure 8. A simple resistor divider (R3, R4) produces approximately −300 mV from −15 V. The C2 capacitor in parallel with R3 is an integral part of the low leakage configuration and must be 4.7 μF or greater. Figure 7 is a plot of leakage current vs. temperature for both conditions. It clearly shows the improvement gained by using the low leakage configuration. Table 7. Bipolar Code Table for the Offset Binary Circuit of Figure 8 Binary Number In DAC Register Analog Output VOUT MSB LSB 11 1111 1111 1111 +VIN(8191/8192) 10 0000 0000 0001 +VIN(1/8192) 10 0000 0000 0000 0 V 01 1111 1111 1111 −VIN(1/8192) 00 0000 0000 0000 −VIN(8191/8192) 30 40 50 60 70 80 90 100 110 120 TEMPERATURE (°C) 60 50 40 30 20 10 0 VDD = 15V VREF = 10V VSS = 0V VSS = –0.3V Figure 7. Graph of Typical Leakage Current vs. Temperature for AD7538 619 5 24 23 1 20 21 22 2 3 4 DB13 TO DB0 DGND VDD VREF RFB IOUT VDD –15V AGND VSS LDAC CS WR LDAC CS WR AD7538 A1 R3 1kΩ R2 22Ω R5 10kΩ R7 20kΩ R6 20kΩ R8 5kΩ, 10% R1 50Ω R4 47kΩ INPUT DATA DIGITAL GND C2 4.7µF C1 33pF ANALOG GND AD711 A2 AD711 VIN VO + Figure 8. Bipolar Operation |
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