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APA3169 Datasheet(PDF) 4 Page - Anpec Electronics Coropration |
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APA3169 Datasheet(HTML) 4 Page - Anpec Electronics Coropration |
4 / 53 page Copyright © ANPEC Electronics Corp. Rev. A.4 - Jan., 2013 www.anpec.com.tw 4 APA3169 Electrical Characteristics T A=25 ο C, V PVDD=18V, VAVDD = VDVDD = 3.3V, RL=8Ω, BD Mode, fS=48kHz (unless otherwise noted) APA3169 Symbol Parameter Test Conditions Min. Typ. Max. Unit PWM Operating Conditions 32 kHz Data Rate ±2% 256 44.1k/88.2k/176.4 kHz Data Rate ±2% 352.8 fS Output Sample Rate 48k/96k/192 kHz Data Rate ± 2% 384 kHz PLL Input Parameters and External Filter Components fMCLK MCLK Frequency 2.8224 - 24.576 MHz MCLK Duty Cycle 40 50 60 % tr/tf(MCLK) Rise/Fall Time for MCLK - - 5 ns LRCLK Allowable Drift before LRCLK Reset - - 4 MCLKs External PLL Filter Capacitor C1 SMD 0603 Y5V - 47 - External PLL Filter Capacitor C2 SMD 0603 Y5V - 4.7 - nF External PLL Filter Resistor R - 470 - Ω DC CHARACTERISTICS VOH High Level output voltage(A_SEL and SDA) IOH=-4mA, DVDD=AVDD=3V 2.4 - - V VOL Low Level output voltage(A_SEL and SDA) IOL=4mA, DVDD=AVDD=3V - - 0.5 V IIL Low Level Input Current VI<VIL, DVDD=AVDD=3.6V - - 75 µA IIH High Level Input Current VI>VIH, DVDD=AVDD=3.6V - - 75 µA Normal Mode (No LC, No load) - 14 20 IDD 3.3V Supply Current (AVDD+DVDD) Reset (No LC, No load) - 14 20 Normal Mode (No LC, No load) - 18 36 IPVDD Full Bridge Stage Supply Current (PVDD_X) Reset (No LC, No load) - 0.5 1.6 mA Drain to source resistance,LS TJ=25 oC, includes metallization resistance - 180 - m Ω rDS(ON) Drain to source resistance,HS TJ=25 oC, includes metallization resistance - 180 - m Ω VUVP Undervoltage protection limit PVDD falling - 6.8 - V VUVP,hyst Undervoltage protection limit PVDD rising - 7.2 - V Thermal Protection Threshold - 150 - TTP Thermal Protection Threshold Hysteresis - 30 - oC |
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