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AD7837AN Datasheet(PDF) 4 Page - Analog Devices |
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AD7837AN Datasheet(HTML) 4 Page - Analog Devices |
4 / 12 page AD7837/AD7847 REV. C –4– TERMINOLOGY Relative Accuracy (Linearity) Relative accuracy, or endpoint linearity, is a measure of the maximum deviation of the DAC transfer function from a straight line passing through the endpoints. It is measured after allowing for zero and full-scale errors and is expressed in LSBs or as a percentage of full-scale reading. Differential Nonlinearity Differential nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ±1 LSB or less over the operating temperature range ensures monotonicity. Zero Code Offset Error Zero code offset error is the error in output voltage from VOUTA or VOUTB with all 0s loaded into the DAC latches. It is due to a combination of the DAC leakage current and offset errors in the output amplifier. Gain Error Gain error is a measure of the output error between an ideal DAC and the actual device output with all 1s loaded. It does not include offset error. Total Harmonic Distortion This is the ratio of the root-mean-square (rms) sum of the har- monics to the fundamental, expressed in dBs. Multiplying Feedthrough Error This is an ac error due to capacitive feedthrough from the VREF input to VOUT of the same DAC when the DAC latch is loaded with all 0s. Channel-to-Channel Isolation This is an ac error due to capacitive feedthrough from the VREF input on one DAC to VOUT on the other DAC. It is measured with the DAC latches loaded with all 0s. Digital Feedthrough Digital feedthrough is the glitch impulse injected from the digi- tal inputs to the analog output when the data inputs change state, but the data in the DAC latches is not changed. For the AD7837, it is measured with LDAC held high. For the AD7847, it is measured with CSA and CSB held high. Digital Crosstalk Digital crosstalk is the glitch impulse transferred to the output of one converter due to a change in digital code on the DAC latch of the other converter. It is specified in nV secs. Digital-to-Analog Glitch Impulse This is the voltage spike that appears at the output of the DAC when the digital code changes, before the output settles to its final value. The energy in the glitch is specified in nV secs and is measured for a 1 LSB change around the major carry transition (0111 1111 1111 to 1000 0000 0000 and vice versa). Unity Gain Small Signal Bandwidth This is the frequency at which the small signal voltage output from the output amplifier is 3 dB below its dc level. It is mea- sured with the DAC latch loaded with all 1s. Full Power Bandwidth This is the maximum frequency for which a sinusoidal input signal will produce full output at rated load with a distortion less than 3%. It is measured with the DAC latch loaded with all 1s. AD7837 PIN FUNCTION DESCRIPTION (DIP AND SOIC PIN NUMBERS) Pin Mnemonic Description 1 CS Chip Select. Active low logic input. The device is selected when this input is active. 2RFBA Amplifier Feedback Resistor for DAC A. 3VREFA Reference Input Voltage for DAC A. This may be an ac or dc signal. 4VOUTA Analog Output Voltage from DAC A. 5 AGNDA Analog Ground for DAC A. 6VDD Positive Power Supply. 7VSS Negative Power Supply. 8 AGNDB Analog Ground for DAC B. 9VOUTB Analog Output Voltage from DAC B. 10 VREFB Reference Input Voltage for DAC B. This may be an ac or dc signal. 11 DGND Digital Ground. Ground reference for digital circuitry. 12 RFBB Amplifier Feedback Resistor for DAC B. 13 WR Write Input. WR is an active low logic input which is used in conjunction with CS, A0 and A1 to write data to the input latches. 14 LDAC DAC Update Logic Input. Data is transferred from the input latches to the DAC latches when LDAC is taken low. 15 A1 Address Input. Most significant address input for input latches (see Table II). 16 A0 Address Input. Least significant address input for input latches (see Table II). 17–20 DB7–DB4 Data Bit 7 to Data Bit 4. 21–24 DB3–DB0 Data Bit 3 to Data Bit 0 (LSB) or Data Bit 11 (MSB) to Data Bit 8. |
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