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SN74AVCAH164245GR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AVCAH164245GR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 19 page www.ti.com FEATURES DESCRIPTION/ORDERING INFORMATION SN74AVCAH164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES396A – JULY 2002 – REVISED JUNE 2005 • Ioff Supports Partial-Power-Down Mode Operation • Member of the Texas Instruments Widebus™ Family • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to • DOC™ Circuitry Dynamically Changes Output 3.6-V Power-Supply Range Impedance, Resulting in Noise Reduction Without Speed Degradation • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA • Latch-Up Performance Exceeds 100 mA Per at 2.5-V VCC JESD 78, Class II • Control Inputs VIH/VIL Levels Are Referenced • ESD Protection Exceeds JESD 22 to VCCA Voltage – 2000-V Human-Body Model (A114-A) • If Either VCC Input Is at GND, Both Ports Are in – 200-V Machine Model (A115-A) the High-Impedance State – 1000-V Charged-Device Model (C101) • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, then both ports are in the high-impedance state. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING TSSOP – DGG Tape and reel SN74AVCAH164245GR AVCAH164245 –40°C to 85°C TVSOP – DGV Tape and reel SN74AVCAH164245VR WAH4245 VFBGA – GQL Tape and reel SN74AVCAH164245KR WAH4245 (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, DOC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2002–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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