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TLK2711IRCPG4 Datasheet(PDF) 6 Page - Texas Instruments |
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TLK2711IRCPG4 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 27 page TLK2711 1.6 TO 2.7 GBPS TRANSCEIVER SLLS501 – SEPTEMBER 2001 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) TERMINAL NAME NO. I/O DESCRIPTION GQE RCP I/O DESCRIPTION RXD0 RXD1 RXD2 RXD3 RXD4 RXD5 RXD6 RXD7 RXD8 RXD9 RXD10 RXD11 RXD12 RXD13 RXD14 RXD15 H3 J2 H2 H1 G2 G1 F2 F1 E1 D1 C1 D2 C2 B1 B2 A2 51 50 49 47 46 45 44 42 40 39 37 36 35 34 32 31 O Receive data bus. These outputs carry 16-bit parallel data output from the transceiver to the protocol device, synchronized to RXCLK. The data is valid on the rising edge of RXCLK as shown in Figure 5. These terminals are in high-impedance state during power-on reset. RXN RXP DINRXN DINRXP J3 J4 53 54 I Serial receive inputs. RXP and RXN together are the differential serial input interface from a copper or an optical I/F module. TESTEN B4 27 I‡ Test mode enable. This terminal should be left unconnected or tied low. TKLSB A6 22 I† K-code generator (LSB). When TKLSB is high, an 8-bit/10-bit K code is transmitted as controlled by data bits TXD0 –TXD7. When TKLSB is low an 8-bit/10-bit D code is transmitted as controlled by data bits TXD0 – TXD7. TKMSB B7 20 I† K-code generator (MSB). When TKMSB is high an 8-bit/10-bit K code is transmitted as controlled by data bits TXD8 –TXD15. When TKMSB is low an 8-bit/10-bit D code is transmitted as controlled by data bits TXD8 – TXD15. TXCLK GTX_CLK E9 8 I Reference clock. TXCLK is a continuous external input clock that synchronizes the transmitter interface signals TKMSB, TKLSB and TXD [0..15]. The frequency range of TXCLK is 80 MHz to 135 MHz. The transmitter uses the rising edge of this clock to register the 16-bit input data TXD [0..15] for serialization. TXD0 TXD1 TXD2 TXD3 TXD4 TXD5 TXD6 TXD7 TXD8 TXD9 TXD10 TXD11 TXD12 TXD13 TXD14 TXD15 H7 J8 H8 H9 G8 G9 F9 F8 D9 D8 C9 C8 B9 B8 A8 A7 62 63 64 2 3 4 6 7 10 11 12 14 15 16 17 19 I Transmit data bus. These inputs carry the 16-bit parallel data output from a protocol device to the transceiver for encoding, serialization, and transmission. This 16-bit parallel data is clocked into the transceiver on the rising edge of TXCLK as shown in Figure 2. TXN TXP DOUTTXN DOUTTXP J6 J7 59 60 O Serial transmit outputs. TXP and TXN are differential serial outputs that interface to copper or an optical I/F module. These terminals transmit NRZ data at a rate of 20 times the TXCLK value. TXP and TXN are put in a high-impedance state when LOOPEN is high and are active when LOOPEN is low. During power-on reset these terminals are high impedance. † Internal 10k pullup ‡ Internal 10k pulldown |
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