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TPS2115ADRBTG4 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS2115ADRBTG4 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 27 page  TPS2114A TPS2115A www.ti.com SBVS044F – MARCH 2004 – REVISED MAY 2012 ELECTRICAL CHARACTERISTICS: GENERAL (continued) Over recommended operating junction temperature range, VI(IN1) = VI(IN2) = 5.5 V, and RILIM = 400 Ω, unless otherwise noted. TPS2114A PARAMETER TEST CONDITIONS MIN TYP MAX UNIT REVERSE CONDUCTION BLOCKING D0 = D1 = high, VI(INx) = 3.3 V Minimum input-to-output voltage Connect OUT to a 5-V supply through a series 1-k Ω ΔVO(I_block) 80 100 120 mV difference to block switching resistor. Let D0 = low. Slowly decrease the supply voltage until OUT connects to IN1. THERMAL SHUTDOWN Thermal shutdown threshold TPS211xA is in current limit 135 °C Recovery from thermal shutdown TPS211xA is in current limit 125 °C Hysteresis 10 °C IN2 −IN1 COMPARATORS Hysteresis of IN2 −IN1 comparator 0.1 0.2 V Deglitch of IN2 −IN1 comparator 10 20 50 μs (both ↑↓) STAT OUTPUT Leakage current VO(STAT) = 5.5 V 0.01 1 μA Saturation voltage II(STAT) = 2 mA, IN1 switch is on 0.13 0.4 V Deglitch time (falling edge only) 150 μs SWITCHING CHARACTERISTICS Over recommended operating junction temperature range, VI(IN1) = VI(IN2) = 5.5 V, and RILIM = 400 Ω, unless otherwise noted. TPS2114A TPS2115A PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT POWER SWITCH Output rise time from VI(IN1) = VI(IN2) = 5 V, TJ = 25°C, CL = 1 μF, IL = 500 mA tr 0.5 1.0 1.5 1 1.8 3 ms an enable (see Figure 1a) Output fall time from a VI(IN1) = VI(IN2) = 5 V, TJ = 25°C, CL = 1 μF, IL = 500 mA tf 0.35 0.5 0.7 0.5 1 2 ms disable (see Figure 1a) IN1 to IN2 transition, VI(IN1) = 3.3 V, VI(IN2) = 5 V, TJ = 125°C, CL = 10 μF, IL = 500 mA 40 60 40 60 μs Measure transition time as 10 −90% rise time or from 3.4 V to 4.8 V on VO(OUT) (see Figure 1b). tt Transition time IN2 to IN1 transition, VI(IN1) = 5 V, VI(IN2) = 3.3 V, TJ = 125°C, CL = 10 μF, IL = 500 mA 40 60 40 60 μs Measure transition time as 10 −90% rise time or from 3.4 V to 4.8 V on VO(OUT) (see Figure 1b). VI(IN1) = VI(IN2) = 5 V, measured from enable to 10% of Turn-on propagation tPLH1 VO(OUT), TJ = 25°C, CL = 10 μF, IL = 500 mA 0.5 1 ms delay from enable (see Figure 1a) VI(IN1) = VI(IN2) = 5 V, measured from disable to 90% of Turn-off propagation tPHL1 VO(OUT), TJ = 25°C, CL = 10 μF, IL = 500 mA 3 5 ms delay from a disable (see Figure 1a) Logic 1 to Logic 0 transition on D1, VI(IN1) = 1.5 V, Switch-over rising VI(IN2) = 5 V, VI(D0) = 0 V, measured from D1 to 10% of tPLH2 40 100 40 100 μs propagation delay VO(OUT), TJ = 25°C, CL = 10 μF, IL = 500 mA (see Figure 1c) Logic 0 to Logic 1 transition on D1, VI(IN1) = 1.5V, Switch-over falling VI(IN2) = 5V, VI(D0) = 0 V, measured from D1 to 90% of tPHL2 2 3 10 2 5 10 ms propagation delay VO(OUT), TJ = 25°C, CL = 10 μF, IL = 500 mA (see Figure 1c) Copyright © 2004–2012, Texas Instruments Incorporated 5 |
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