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UCC3919D Datasheet(PDF) 10 Page - Texas Instruments

Part # UCC3919D
Description  3-V TO 8-V HOT SWAP POWER MANAGER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC3919D Datasheet(HTML) 10 Page - Texas Instruments

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UCC2919
UCC3919
SLUS374C − JULY 1999 − REVISED NOVEMBER 2005
10
www.ti.com
APPLICATION INFORMATION
It can be seen that power limiting will only occur when IPL is > 0 (it cannot be negative). For power limiting to
begin to occur, the voltage drop across the MOSFET must be greater than VDD−VPL or 1.4 V(typ).
V
IN *
V
OUT w
1.4 V
The on time using RPL is defined as:
t
ON +
C
T
DV
I
PL )
35
10−6
,
where
DV + 1V
The graph in Figure 4 illustrates the effect of RPL on the average MOSFET power dissipation into a short. The
equation for the average power dissipation during a short is:
P
DISS +
I
MAX
V
IN
1.2
10−6
I
PL )
35
10−6
,or
P
DISS +
I
MAX
V
IN
t
ON
t
ON )
t
OFF
If PL is left unconnected, the power limiting feature will not be exercised. In the retry mode, the duty cycle during
a fault will be nominally 3%, independent of input voltage. The average power dissipation in the external
MOSFET with a shorted output will be proportional to input voltage, as shown by the equation:
P
DISS +
I
MAX
V
IN
0.033
calculating CT(min) for a given load capacitance without power limiting
To ensure recovery from an overload when operating in the retry mode, there is a maximum total output
capacitance which can be charged for a given tON (fault time) before causing a fault. For a worst case situation
of a constant current load below the fault threshold, CT(min) for a given output load capacitance (without power
limiting) can be calculated from:
C
T(min) +
V
IN
C
OUT
35
10−6
I
MAX *
I
LOAD
A larger load capacitance or a smaller CT will cause a fault when recovering from an overload, causing the circuit
to get stuck in a continuous hiccup mode. To handle larger capacitive loads, increase the value of CT. The
equation can be easily re-written, if desired, to solve for COUT(max) for a given value of CT.
For a resistive load of value RL and an output cap COUT, CT(min) can be smaller than in the constant current case,
and can be estimated from:
C
T(min) +
−C
OUT
R
L
n 1
*
V
IN
I
MAX
R
L
28
103
Note that in the latch mode (or when first turning on in the retry mode), since the timing capacitor is not recovering
from a previous fault, it is charging from 0 V rather than 0.5 V. This allows up to 50% more load capacitance
without causing a fault.
(8)
(9)
(10)
(11)
(12)
(13)


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