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74AUP1G02 Datasheet(PDF) 9 Page - NXP Semiconductors |
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74AUP1G02 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 21 page 74AUP1G02 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 6 — 27 June 2012 9 of 21 NXP Semiconductors 74AUP1G02 Low-power 2-input NOR gate [1] All typical values are measured at nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in μW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. Tamb = 25 °C CPD power dissipation capacitance f = 1 MHz; VI = GND to VCC [3] VCC = 0.8 V - 2.6 - pF VCC = 1.1 V to 1.3 V - 2.7 - pF VCC = 1.4 V to 1.6 V - 2.9 - pF VCC = 1.65 V to 1.95 V - 3.1 - pF VCC = 2.3 V to 2.7 V - 3.5 - pF VCC = 3.0 V to 3.6 V - 4.1 - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9 Symbol Parameter Conditions Min Typ [1] Max Unit Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9 Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max CL = 5 pF tpd propagation delay A, B to Y; see Figure 8 [1] VCC = 1.1 V to 1.3 V 2.1 12.1 2.1 13.4 ns VCC = 1.4 V to 1.6 V 1.4 7.8 1.4 8.6 ns VCC = 1.65 V to 1.95 V 1.1 6.2 1.1 6.9 ns VCC = 2.3 V to 2.7 V 0.9 4.6 0.9 5.1 ns VCC = 3.0 V to 3.6 V 0.8 4.0 0.8 4.4 ns CL = 10 pF tpd propagation delay A, B to Y; see Figure 8 [1] VCC = 1.1 V to 1.3 V 2.2 14.3 2.2 15.8 ns VCC = 1.4 V to 1.6 V 1.7 9.2 1.7 10.2 ns VCC = 1.65 V to 1.95 V 1.5 7.3 1.5 8.1 ns VCC = 2.3 V to 2.7 V 1.2 5.6 1.2 6.2 ns VCC = 3.0 V to 3.6 V 1.2 5.0 1.2 5.5 ns |
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