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TAS5412-Q1 Datasheet(PDF) 4 Page - Texas Instruments

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Part # TAS5412-Q1
Description  TWO-CHANNEL AUTOMOTIVE DIGITAL AMPLIFIER
Download  38 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5412-Q1 Datasheet(HTML) 4 Page - Texas Instruments

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TAS5412-Q1
SLOS685A – AUGUST 2013 – REVISED OCTOBER 2013
www.ti.com
Table 1. TERMINAL FUNCTIONS (continued)
TERMINAL
TYPE
DESCRIPTION
NAME
NO.
3, 7-9, 12,14,
16, 17, 21–26,
GND
30–32, 35, 38,
GND
Ground
39, 43, 49–51,
55–60
I2C_ADDR
62
AI
I2C address bit
IN1_P
15
AI
Non-inverting analog input for channel 1
IN2_P
19
AI
Non-inverting analog input for channel 2
IN_M
18
ARTN
Signal return for both analog channel inputs
MUTE
2
DI
Gain-ramp control
NU
33, 34, 47, 48
NC
No connect, do not connect to ground
OSC_SYNC
61
DI, DO
Oscillator input from master or output to slave amplifiers
OUT1_M
45
PO
– polarity output for bridge 1
OUT1_P
44
PO
+ polarity output for bridge 1
OUT2_M
37
PO
– polarity output for bridge 2
OUT2_P
36
PO
+ polarity output for bridge 2
PVDD
27–29, 52–54
PWR
PVDD supply
REXT
10
AI
Precision resistor pin to set analog reference
SCL
64
DI
I2C clock input from system I2C master
SDA
63
DI, DO
I2C data I/O for communication with system I2C master
STANDBY
4
DI
Active-low STANDBY pin. Standby (low), power up (high)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
PVDD
DC supply voltage range
Relative to GND
–0.3 to 30
V
PVDD MAX
Pulsed supply-voltage range
t
≤ 400 ms exposure
–1 to 50
V
PVDD RAMP
Supply-voltage ramp rate
15
V/ms
IPVDD
Externally imposed dc supply current per PVDD or GND pin
±12
A
IPVDD_MAX
Pulsed supply current per PVDD pin (one shot)
t < 100 ms
17
A
IO
Maximum allowed dc current per output pin
±13.5
A
IO_MAX
(1)
Pulsed output current per output pin (single pulse)
t < 100 ms
±17
A
IIN_MAX
Maximum current, all digital and analog input pins (2)
DC or pulsed
±1
mA
IMUTE_MAX
Maximum current on MUTE pin
DC or pulsed
±20
mA
IIN_ODMAX
Maximum sinking current for open-drain pins
7
mA
Input voltage range for logic pin relative to GND (SCL and
VLOGIC
–0.3 to 6
V
SDA pins)
VI2C_ADDR
Input voltage range for I2C_ADDR pin relative to GND
–0.3 to 6
V
VSTANDBY
Input voltage range for STANDBY pin
–0.3 to 5.5
V
VOSC_SYNC
Input voltage range for OSC_SYNC pin relative to GND
–0.3 to 3.6
V
VAIN_AC_MAX_5412
Maximum ac-coupled input voltage(2), analog input pins
1.9
Vrms
VGND
Maximum voltage between GND pins
±0.3
V
TJ
Maximum operating junction temperature range
–55 to 150
°C
Tstg
Storage temperature range
–55 to 150
°C
(1)
Pulsed-current ratings are maximum survivable currents externally applied to the TAS5412-Q1. Reverse-battery, fortuitous open-ground,
and fortuitous open-supply fault conditions may result in high currents.
(2)
See Application Information section for information on analog input voltage and ac coupling.
4
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