TLK105LRHBR datasheet(3/105 Pages) TI1

Part #	TLK105LRHBR

Description	Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver

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Manufacturer	TI1 [Texas Instruments]

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TLK105L

TLK106L

www.ti.com

SLLSEE3A – AUGUST 2013 – REVISED NOVEMBER 2013

1

Introduction

.............................................. 1

6

Reset and Power Down Operation

................. 35

1.1

Features

............................................. 1

6.1

Hardware Reset

.................................... 35

1.2

Applications

.......................................... 1

6.2

Software Reset

..................................... 35

1.3

Device Overview

..................................... 1

6.3

Power Down/Interrupt

.............................. 35

2

Pin Descriptions

......................................... 4

6.4

Power Save Modes

................................. 36

2.1

Pin Layout

........................................... 4

7

Design Guidelines

..................................... 37

2.2

Serial Management Interface (SMI)

................. 5

7.1

TPI Network Circuit

................................. 37

2.3

MAC Data Interface

.................................. 5

7.2

Clock In (XI) Requirements

......................... 37

2.4

10Mbs and 100Mbs PMD Interface

.................. 6

7.3

Thermal Vias Recommendation

.................... 39

2.5

Clock Interface

....................................... 6

7.4

Fiber Networking Circuit

............................ 39

2.6

LED Interface

........................................ 6

8

Register Block

......................................... 40

2.7

Reset and Power Down

............................. 6

8.1

Register Definition

.................................. 46

2.8

Power and Bias Connections

........................ 7

8.2

Cable Diagnostic Control Register (CDCR)

........ 69

3

Hardware Configuration

............................... 8

8.3

PHY Reset Control Register (PHYRCR)

........... 69

3.1

Bootstrap Configuration

.............................. 8

8.4

Multi LED Control register (MLEDCR)

............. 70

8.5

IEEE1588 Precision Timing Pin Select (PTPPSEL)

3.2

Power Supply Configuration

......................... 9

...................................................... 70

3.3

IO Pins Hi-Z State During Reset

................... 11

8.6

IEEE1588 Precision Timing Configuration

3.4

Auto-Negotiation

.................................... 11

(PTPCFG)

.......................................... 70

3.5

Auto-MDIX

.......................................... 11

8.7

Fiber Mode Control Register (FIBCR)

.............. 71

3.6

MII Isolate Mode

.................................... 12

8.8

TX_CLK Phase Shift Register (TXCPSR)

.......... 71

3.7

PHY Address

....................................... 12

8.9

Power Back Off Control Register (PWRBOCR)

.... 71

3.8

LED Interface

....................................... 13

8.10

Voltage Regulator Control Register (VRCR)

....... 72

3.9

Loopback Functionality

............................. 14

8.11

Fiber Mode Control Register 2 (FIBCR2)

.......... 72

3.10

BIST

................................................ 15

8.12

Fiber Mode Control Register 3 (FIBCR3)

.......... 72

3.11

Cable Diagnostics

.................................. 16

8.13

Cable Diagnostic Configuration/Result Registers

.. 73

4

Interfaces

................................................ 17

9

Electrical Specifications

............................. 79

4.1

Media Independent Interface (MII)

................. 17

9.1

ABSOLUTE MAXIMUM RATINGS

................. 79

4.2

Reduced Media Independent Interface (RMII)

..... 18

9.2

RECOMMENDED OPERATING CONDITIONS

.... 79

4.3

Serial Management Interface

....................... 20

9.3

TLK105L 32-Pin Industrial Device (85°C) Thermal

5

Architecture

............................................. 24

Characteristics

...................................... 79

5.1

100Base-TX Transmit Path

......................... 24

9.4

TLK106L 32-Pin Extended Temperature (105°C)

Device Thermal Characteristics

.................... 80

5.2

100Base-TX Receive Path

......................... 27

9.5

DC CHARACTERISTICS, VDD_IO

................ 80

5.3

10Base-T Receive Path

............................ 29

9.6

DC CHARACTERISTICS

........................... 80

5.4

Auto Negotiation

.................................... 30

9.7

POWER SUPPLY CHARACTERISTICS

........... 81

5.5

Link Down Functionality

............................ 32

9.8

AC Specifications

................................... 82

5.6

100BaseX Fiber Mode

.............................. 33

Revision History

............................................ 98

5.7

IEEE 1588 Precision Timing Protocol Support

..... 33

Contents

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