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TLK106LRHBT Datasheet(PDF) 10 Page - Texas Instruments |
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TLK106LRHBT Datasheet(HTML) 10 Page - Texas Instruments |
10 / 105 page Pin 9 (RD–) RD– Pin 10 (RD+) RD+ 49.9 W 3.3V Supply Pin 11 (TD–) TD– Pin 12 (TD+) TD+ 1:1 T1 RJ45 Pin 14 (AVDD33) Pin 15 (PFBOUT) Pin 13 (PFBIN1) Pin 24 (PFBIN2) 3.3V Supply Pin 21 (VDD_IO) Floating 49.9 W 49.9 W 49.9 W 1:1 3.3V Supply 10 F m 10nF 1nF 100pF 1.55V Supply 10 F m 10nF 1nF 100pF 10 F m 10nF 1nF 100pF 0.1 F* m 1 F m 1 F m 0.1 F m 0.1 F m 3.3V Supply 3.3V Supply 1 F m 1 F m 1.55V Supply 10 F m 10nF 1nF 100pF TLK105L TLK106L SLLSEE3A – AUGUST 2013 – REVISED NOVEMBER 2013 www.ti.com 3.2.2 Dual Supply Operation When a 1.55V external power rail is available, the TLK10xL can be configured as shown in Figure 3-2. PFBOUT (pin 15) is left floating. The 1.55V external supply is connected to PFBIN1 (pin 13) and PFBIN2 (pin 24). Furthermore, to lower the power consumption, the internal regulator should be powered down by writing ‘1’ to bit 15 of the VRCR register (0x00d0h). Figure 3-2. Power Connections for Dual Supply Operation When operating with dual supplies, follow these guidelines: • When powering up, ramp up the 3.3V supply before the 1.55V supply. • When powering down, turn off the 1.55V supply before turning off the 3.3V supply. • Use the external RESET pin after power up to reset the PHY. • To use the internal power-on reset, PFBIN1 and PFBIN2 must be operational less than 100ms after 3.3V rises to detect the internal RESET. 3.2.3 Variable IO Voltage The TLK10xL digital IO pins can operate with a variable supply voltage. While the primary applications will use 3.3V, VDD_IO can also operate on 2.5V, and for MII mode only, VDD_IO of 1.8V can be used as well. For more details, see Section 9.5. 10 Hardware Configuration Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLK105L TLK106L |
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