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TLK111PT Datasheet(PDF) 4 Page - Texas Instruments |
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TLK111PT Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 109 page  RBIAS PFBOUT AVDD33 SW_STRAP RESERVED AGND PFBIN1 TD + TD – AGND RD + RD – 38 39 40 41 42 43 44 45 46 47 48 23 22 21 20 19 18 17 16 15 14 13 PFBIN2 RX_CLK RX_DV / MII_MODE CRS/CRS_DV / LED_CFG RX_ER / AMDIX_EN COL / PHYAD0 RXD_0 / PHYAD1 RXD_1 / PHYAD2 RXD_2 / PHYAD3 RXD_3 / PHYAD4 IOGND VDD_IO 24 37 TLK111 SLLSEF8A – AUGUST 2013 – REVISED NOVEMBER 2013 www.ti.com 2 Pin Descriptions The TLK111 pins fall into the following interface categories (subsequent sections describe each interface): • Serial Management Interface • Reset and Power Down • MAC Data Interface • Bootstrap Configuration Inputs • Clock Interface • 10/100Mbs PMD Interface • LED Interface • Special Connect Pins • JTAG Interface • Power and Ground pins Note: Configuration pin option. See Section 3.1 for Jumper Definitions. The definitions below define the functionality of each pin. Type: I Input Type: OD Open Drain Type: O Output Type: PD, PU Internal Pulldown/Pullup Type: I/O Input/Output Type: S Configuration Pin (All configuration pins have weak internal pullups or pulldowns. Use an external 2.2k Ω resistor if you need a different default value. See Section 3.1 for details.) 2.1 Pin Layout Figure 2-1. TLK111 PIN DIAGRAM, TOP VIEW This document describes signals that take on different names depending on configuration. In such cases, the different names are placed together and separated by slash (/) characters. For example, "RXD_3 / PHYAD4". Active low signals are represented by overbars. 2.2 Serial Management Interface (SMI) 4 Pin Descriptions Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLK111 |
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