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TLV70228QDDCRQ1 Datasheet(PDF) 2 Page - Texas Instruments |
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TLV70228QDDCRQ1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 18 page TLV702xx-Q1 SLVSC35A – AUGUST 2013 – REVISED AUGUST 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT MIN MAX IN –0.3 6 V Voltage(2) EN –0.3 6 V OUT –0.3 6 V Current (source) OUT Internally Limited Output short-circuit duration Indefinite Ambient, TA –40 125 °C Temperature Operating virtual junction, TJ –55 150 °C Storage, Tstg –55 150 °C Human Body Model (HBM) AEC-Q100 classification level H2 2 kV Electrostatic Discharge Rating(3) Charge Device Model (CDM) AEC-Q100 classification level 750 V C4B (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. THERMAL INFORMATION TLV702xx-Q1 THERMAL METRIC(1) DDC UNIT 5 PINS θJA Junction-to-ambient thermal resistance 262.8 θJCtop Junction-to-case (top) thermal resistance 68.2 θJB Junction-to-board thermal resistance 81.6 °C/W ψJT Junction-to-top characterization parameter 1.1 ψJB Junction-to-board characterization parameter 80.9 θJCbot Junction-to-case (bottom) thermal resistance n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TLV702xx-Q1 |
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