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A1020B-1PG84B Datasheet(PDF) 1 Page - Actel Corporation |
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A1020B-1PG84B Datasheet(HTML) 1 Page - Actel Corporation |
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1 / 98 page  Ja nuar y 2000 1 © 2000 Actel Corporation v 3.0 HiRel FPGAs Fe a t ur es • Highly Predictable Performance with 100% Automatic Placement and Routing • Device Sizes from 1,200 to 20,000 Gates • Up to 6 Fast, Low-Skew Clock Networks • Up to 202 User-Programmable I/O Pins • More Than 500 Macro Functions • Up to 1,276 Dedicated Flip-Flops • I/O Drive to 10 mA • Devices Available to DSCC SMD • CQFP and CPGA Packaging • Nonvolatile, User Programmable • Logic Fully Tested Prior to Shipment • 100% Military Temperature Tested (–55°C to +125°C) • QML Certified Devices • Proven Reliability Data Available • Successful Military/Avionics Supplier for Over 10 Years A C T 3 Fe at ure s • Highest-Performance, Highest-Capacity FPGA Family • System Performance to 60 MHz over Military Temperature • Low-Power 0.8µ CMOS Technology 3 200 DX F eat u r e s • 100 MHz System Logic Integration • Highest Speed FPGA SRAM, up to 2.5 kbits Configurable Dual-Port SRAM • Fast Wide-Decode Circuitry • Low-Power 0.6µ CMOS Technology 12 0 0 X L Fe at ure s • Pin for Pin Compatible with ACT 2 • System Performance to 50 MHz over Military Temperature • Low-Power 0.6µ CMOS Technology A C T 2 Fe at ure s • Best-Value, High-Capacity FPGA Family • System Performance to 40 MHz over Military Temperature • Low-Power 1.0µ CMOS Technology A C T 1 Fe at ure s • Lowest-Cost FPGA Family • System Performance to 20 MHz over Military Temperature • Low-Power 1.0µ CMOS Technology P r o d u c t F a m ily P r o f ile (more devices on page 2) Family 3200DX ACT 3 1200XL Device A32100DX A32200DX A1425A A1460A A14100A A1280XL Capacity System Gates Logic Gates SRAM Bits 15,000 10,000 2,048 30,000 20,000 2,560 3,750 2,500 NA 9,000 6,000 NA 15,000 10,000 NA 12,000 8,000 Logic Modules S-Modules C-Modules Decode 1,362 700 662 20 2,414 1,230 1,184 24 310 160 150 NA 848 432 416 NA 1,377 697 680 NA 1,232 624 608 NA Flip-Flops (Maximum) 738 1,276 435 976 1,493 998 User I/Os (Maximum) 152 202 100 168 228 140 Performance System Speed (maximum) 55 MHz 55 MHz 60 MHz 60 MHz 60 MHz 50 MHz Packages (by Pin Count) CPGA CQFP 84 208, 256 133 132 207 196 257 256 176 172 |
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