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TPS53515RVET Datasheet(PDF) 6 Page - Texas Instruments |
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TPS53515RVET Datasheet(HTML) 6 Page - Texas Instruments |
6 / 33 page TPS53515 SLUSBN5A – AUGUST 2013 – REVISED DECEMBER 2013 www.ti.com PIN DESCRIPTIONS (continued) PIN I/O(1) DESCRIPTION NAME NO. TRIP is the OCL detection threshold setting pin. ITRIP = 10 µA at room temp, 3000 ppm/°C current is TRIP 25 I/O sourced and sets the OCL trip voltage. See the Current Sense and Overcurrent Protection section for detailed OCP setting. VBST is the supply rail for the high-side gate driver (boost terminal). Connect the bootstrap capacitor VBST 4 P from this pin to the SW node. Internally connected to VREG via bootstrap PMOS switch. VDD 19 P Power-supply input pin for controller. Input of the VREG LDO. The input range is from 4.5 to 25 V. 15 VIN 16 P VIN is the conversion power-supply input pins. 17 VREG 20 O VREG is the 5-V LDO output. This voltage supplies the internal circuitry and gate driver. VO 24 I VOUT voltage input to the controller. 6 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated |
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