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TS55101 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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TS55101 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
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2 / 7 page  - 2 - TS55101 Version 0.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC Triune Systems Proprietary and Confidential Information DO NOT DUPLICATE PRODUCT PREVIEW PINOUT TS55101 QFN16 4x4 Top/Symbolization View PGND PGND VIN GND SW SW nFT BOOT Figure 1b: Package Pinout Diagram PIN DESCRIPTION Pin Symbol Pin # Function Description GND 1 Ground Primary ground for the majority of the device except the low-side power FET. PGND 2 Power Ground GND supply for internal low-side FET/integrated diode PGND 3 Power Ground GND supply for internal low-side FET/integrated diode VIN 4 Input Voltage Power Supply Input voltage VIN 5 Input Voltage Power Supply Input voltage EN 6 Enable Input Above 2.2V the device is enabled. GND the pin to disable the device. Includes internal pull-up. SDA 7 Data Input/Output I2C data open-drain output. SCL 8 Clock Input I2C clock input. nFLT 9 Inverted Fault Open-drain output. SW 10 Switching Voltage Node Connected to 4.7uH (typical) inductor SW 11 Switching Voltage Node Connected to 4.7uH (typical) inductor BOOT 12 Bootstrap Pin Connected through 22nF capacitor to SW pin VOUT 13 System Output Voltage Positive input for the charge current loop. VBAT 14 Battery Input Regulator Feedback Input VTHERM 15 Battery Temperature Sensor Node for the thermistor which is located in close proximity to the battery. VDD 16 5.0V Supply Output Connected to 100nF capacitor to GND |
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