PG001M

PARALLEL-TO-SERIAL

DATA CONVERTER

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

™

Because the parallel-to-serial conversion requires six

'static' logic signals plus a 'dynamic' (clock) input, the

addition of latches between the

µP and five of the control-

ler IC inputs permits use on a bus. Latching the five

signals to CCW/CW, MS

these five I/O lines for other operations by the

microcontroller. Even at extremely high step rates (>5

kHz), updating the PG001M input data requires an infini-

tesimal percentage of the

µP's I/O and control operations.

Figure 4 — Quarter-Step, Full-Step, and High-Torque Full-Step

RESET

CLOCK

IN

CCW/CW

MODE

SELECT

MODE

SELECT

VECTOR

CONTROL

CLOCK

OUT

SERIAL

DATA

A

SERIAL

DATAB

STROBE

MONITOR

71.4

40

0

40

71.4

71.4

71.4

100

71.4

91

100

91

71.4

71.4

71.4

100

Dwg. WK-006

1/4-STEP MODE

FULL-STEP MODE

PER CENT

OUT

A

B

PER CENT

OUT

1

2

71.4

0

-40

-71.4

71.4

-71.4

-71.4

THIRD QUADRANT

FOURTH QUADRANT

FIRST QUADRANT

SECOND QUADRANT

FIRST QUADRANT

-71.4

71.4

91

100

91

71.4

100

100

40

FULL-STEP MODE

MAXIMUM TORQUE

(141%)