Electronic Components Datasheet Search |
|
AK4679EG Datasheet(PDF) 10 Page - Asahi Kasei Microsystems |
|
AK4679EG Datasheet(HTML) 10 Page - Asahi Kasei Microsystems |
10 / 220 page [AK4679] MS1402-E-06 2013/02 - 10 - PIN/FUNCTION (Cont.) No. Pin Name I/O Function Analog Output ROUT O Rch Stereo Line Output Pin (LODIF bit = “0”: Stereo Line Output) B6 LON O Negative Line Output Pin (LODIF bit = “1”: Full-differential Mono Output) LOUT O Lch Stereo Line Output Pin (LODIF bit = “0”: Stereo Line Output) B7 LOP O Positive Line Output Pin (LODIF bit = “1”: Full-differential Mono Output) A4 RCP O Receiver-Amp Positive Output Pin B4 RCN O Receiver-Amp Negative Output Pin E8 HPL O Lch Headphone-Amp Output Pin E9 HPR O Rch Headphone-Amp Output Pin B1 SPP O Speaker-Amp Positive Output Pin A2 SPN O Speaker-Amp Negative Output Pin C1 SPFIL O Speaker-Amp Filter Pin Connect 2.2nF between SPFIL pin and VSS1. Control Interface for Audio Block G6 SCLA I Control Data Clock Pin H7 SDAA I/O Control Data Input Pin G7 PDNA I Power-Down Mode Pin “H”: Power-up, “L”: Power-down, reset and initializes the control register. Note 1. All input pins except analog input pins (LIN1/IN1+, RIN1/IN1 −, LIN2/IN2-, RIN2/IN2+, LIN3/IN3+, RIN3/IN3 −, LIN4, RIN4) must not be allowed to float. I/O pins (LRCK, BICK and SDAA pins) should be processed appropriately. NO Pin Name I/O Function DSP I/O G1 VDDE - Core Power Supply Pin 1.2V D1 TVDDE - I/O power Supply Pin 1.6 ∼3.6V F1 VSS4 - Ground pin 0V D7 PDNE I Power-Down Mode Pin “H”: Power-up, “L”: Power-down, reset the control register. The AK4679 DSP must be reset once upon power-up. STO Status Output Pin (STRDY bit = “0”) G3 RDY O Data Write Ready output pin for control I/F (STRDY bit = “1”) G5 SYNC1 I Frame Sync 1 pin F6 BCLK1 I Serial Data Clock 1 Pin AK4679 DSP goes into stanby state when BCLK1 is not present. F5 SDIN1 I Serial Data Input 1 Pin H1 SDOUT1 O Serial Data Output 1 Pin D6 SYNC2 O Frame Sync 1 pin F2 BCLK2 O Serial Data Clock 2 Pin D3 SDIN2 I Serial Data Input 2 Pin C4 SDOUT2 O Serial Data Output 2 Pin SYNC3 Frame Sync 3 pin (SELPT bit = “1”) D5 JX1 I Conditional Jump 1 Pin (SELPT bit = “0”) BCLK3 Serial Data Clock 3 Pin (SELPT bit = “1”) F3 JX0 I Conditional Jump 0 Pin (SELPT bit = “0”) E3 SDIN3 I Serial Data Input 3 Pin SDOUT3 Serial Data Output 3 Pin (SELDO3 bit = “0”) F4 GP0 O DSP Programmable output 0 Pin (SELDO3 bit = “1”) C3 SDIN4 I Serial Data Input 4 Pin |
Similar Part No. - AK4679EG |
|
Similar Description - AK4679EG |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |