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AK8137A Datasheet(PDF) 5 Page - Asahi Kasei Microsystems

Part # AK8137A
Description  Low Power Multiclock Generator with XO
Download  11 Pages
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Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK8137A Datasheet(HTML) 5 Page - Asahi Kasei Microsystems

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AK8137A
MS1109_E_02
February-10
- 5 -
AC Characteristics
All specifications at VDD: over 3.0 to 3.6V, Ta: over -20 to +85℃, 25MHz Crystal, unless otherwise noted
(1) 1000 sampling or more
(2) Measured with load condition shown in Figure.1
(3) Measured with load capacitance of 25pF
(4) Refer to Figure.5 on Power down sequence
(5) Refer to Figure.4 on Power On Reset sequence
Parameter
Symbol
Conditions
MIN
TYP
MAX
Unit
Crystal Clock Frequency
F_osc
Pin: XI,XO
25.000
MHz
Cycle to Cycle Jitter 1
Jit_cycle-cycle1
Pin: CPU_Cp, CPU_Cn
(1)(2)
-85
+85
ps
Cycle to Cycle Jitter 2
Jit_cycle-cycle2
Pin: USB_Cp, USB_Cn
(1)(2)
-250
+250
ps
Cycle to Cycle Jitter 3
Jit_cycle-cycle3
Pin: SATA_Cp,SATA_Cn
(1)(2)
-125
+125
ps
Pin: Diff CLK Pins
(2)
Figure.3
45
50
55
%
Output Clock Duty
Cycle
DtyCyc
Pin: REFOUT
(3)
40
50
60
%
Output Clock Slew Rate
Slew_rise_fall
Diff CLK Pins
(2)
Figure3
2.5
8.0
V/ns
Slew rate matching
Slew_ver
Diff CLK Pins
(2)
Figure.2
20
%
Differential output swing
V_swing
Diff CLK Pins
(2)
Figure.3
300
mV
Crossing point voltage
V_cross
Diff CLK Pins
(2)
Figure.2
300
550
mV
Variation of
Vcr
V_cross_delta
Diff CLK Pins
(2)
Figure.2
140
mV
Maximim output voltage
V_max
Diff CLK Pins
(2)
Figure.2
1.15
V
Minimum output voltage
V_min
Diff CLK Pins
(2)
Figure.2
-0.3
V
Output Clock Rise Time
T_rise
Pin: REFOUT
(3 )
2.5
5.0
ns
Output Clock Fall Time
T_fall
Pin: REFOUT
(3 )
2.5
5.0
ns
Output disable Time
(4)
T_dis
Pin: CLK Pins
300
ms
Power-up Time1
(4)
T_put1
Pin: CLK Pins
150
ms
Power-up Time2
(5)
T_put2
Pin: CLK Pins
150
ms


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