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ADP3335ACPZ-2.85R7 Datasheet(PDF) 5 Page - Analog Devices |
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ADP3335ACPZ-2.85R7 Datasheet(HTML) 5 Page - Analog Devices |
5 / 16 page Data Sheet ADP3335 Rev. D | Page 5 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADP3335 TOP VIEW (Not to Scale) OUT 1 OUT 2 OUT 3 GND 4 IN IN SD NR 8 7 6 5 Figure 3. 8-Lead MSOP SD 1 2 3 4 7 8 6 5 TOP VIEW (Not to Scale) OUT OUT GND IN IN NR ADP3335 OUT NOTES 1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE ENHANCES THE THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO DIE SUBSTRATE. THERMAL VIAS MUST BE ISOLATED OR CONNECTED TO IN. DO NOT CONNECT THE THERMAL PAD TO GROUND. Figure 4. 8-Lead LFCSP Table 3. Pin Function Descriptions Pin No. Mnemonic Function 1, 2, 3 OUT Output of the Regulator. Bypass to ground with a 1.0 µF or larger capacitor. All pins must be connected together for proper operation. 4 GND Ground Pin. 5 NR Noise Reduction Pin. Used for further reduction of output noise (see the Noise Reduction section for further details). 6 SD Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this pin should be connected to the input pin. 7, 8 IN Regulator Input. All pins must be connected together for proper operation. EP Exposed Pad The exposed pad on the bottom of the LFCSP package enhances thermal performance and is electrically connected to the die substrate, which is electrically common with the input pins, IN (Pin 7 and Pin 8), inside the package. |
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