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AM79C100 Datasheet(PDF) 8 Page - Advanced Micro Devices |
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AM79C100 Datasheet(HTML) 8 Page - Advanced Micro Devices |
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8 / 24 page  8 Am79C100 polarity detection function is activated following reset or Link Fail, and will reverse the receive polarity based on both the polarity of any previous link beat pulses and the polarity of subsequent packets with a valid end transmit delimiter (ETD). When in the Link Fail state, TPEX Plus will recognize link beat pulses of either positive or negative polarity. Exit from the Link Fail state is caused by the reception of 5 to 6 consecutive link beat pulses of identical polar- ity. On entry to the Link Pass state, the polarity of the last 5 link beat pulses is used to determine the initial re- ceive polarity configuration and the receiver is reconfig- ured to subsequently recognize only link beat pulses of the previously recognized polarity. This link pulse algo- rithm is employed only until SFD polarity determination is made, as described later in this section. Positive link beat pulses are defined as received signal with a positive amplitude greater than 520 mV (LRT = HIGH) with a pulse width of 60 ns to 200 ns. This posi- tive excursion may be followed by a negative excursion. This definition is consistent with the expected received signal at a correctly wired receiver, when a link beat pulse that fits the template of Figure 14-12 in the 10BASE-T standard is generated at a transmitter and passed through 100 m of twisted-pair cable. Negative link beat pulses are defined as received sig- nals with a negative amplitude greater than 520 mV (LRT = HIGH) with a pulse width of 60 ns to 200 ns. This negative excursion may be followed by a positive excursion. This definition is consistent with the ex- pected received signal at a reverse-wired receiver, when a link beat pulse that fits the template of Figure 14-12 in the 10BASE-T standard is generated at a transmitter and passed through 100 m of twisted-pair cable. The polarity detection/correction algorithm will remain “armed” until two consecutive packets with valid ETD of identical polarity are detected. When “armed,” the re- ceiver is capable of changing the initial or previous po- larity configuration based on the most recent ETD polarity. On receipt of the first packet with valid ETD following reset or Link Fail, TPEX Plus will utilize the inferred po- larity information to configure its RXD ± input, regard- less of its previous state. On receipt of a second packet with a valid ETD with correct polarity, the detection/cor- rection algorithm will “lock in” the received polarity. If the second (or subsequent) packet is not detected as confirming the previous polarity decision, the most re- cently detected ETD polarity will be used as the default. Note that packets with invalid ETD have no effect on updating the previous polarity decision. Once two con- secutive packets with valid ETD have been received, TPEX Plus will disable the detection/correction algorithm until either a Link Fail condition occurs or PRDN/RST is asserted. During polarity reversal, the RXPOL pin is internally pulled HIGH. During normal polarity conditions, the RXPOL pin is driven LOW, and is capable of directly driving a “Polarity OK” LED using an integrated 12 mA driver. If desired, the Polarity Reversal function can be disabled by grounding the RXPOL pin. Twisted-Pair Interface Status Three outputs (XMT, RCV, and COL) indicate whether the TPEX Plus is transmitting (AUI to twisted-pair), re- ceiving (twisted-pair to AUI), or in a collision state with both functions active simultaneously. The TPEX Plus will power up in the Link Fail state. The normal algorithm will apply to allow it to enter the Link Pass state. On power up, the XMT, RCV, and COL LED drivers activate for 20 ms to 62 ms as a lamp test fea- ture, and will then go to their inactive state until TPEX Plus enters the Link Pass state. In the Link Pass state, transmit or receive activity that passes the pulse-width/amplitude requirements of the DO ± or RXD± inputs will be indicated by the XMT or RCV pin, respectively, going active. XMT, RCV, and COL are all asserted during a collision. In the Link Fail state, XMT, RCV, and COL are disabled. In Jabber Detect mode, TPEX Plus will activate the COL driver, disable the XMT driver (regardless of DO ± activity), and allow the RCV driver to indicate the cur- rent state of the RXD ± pair. If there is no receive activity on RXD ±, only COL will be active during Jabber Detect. If there is RXD ± activity, both COL and RCV will be active. All three outputs are active LOW and incorporate 12 mA drive capability with 20 ms to 62 ms pulse stretch circuitry, to extend the event to ensure LED visibility. Collision Detect Function Simultaneous Carrier Sense (presence of valid data signals) by both the AUI DO ± pins and the twisted-pair RXD ± pins constitutes a collision, thereby causing a 10 MHz signal to be asserted on the CI ± output pair, and the COL output to be activated. The CI ± output meets the drive requirements for the AUI interface. This 10 MHz signal will remain on the CI ± pair until one of the two colliding states changes from active to idle. During the collision condition, data presented on the DI ± pair will be sourced from the RXD± input. At the end of collision, the data presented on the DI ± pair will be sourced from the last remaining active input, either RXD ± or DO±. The CI± output pair stays HIGH for 2 bit times at the end of a collision, decreasing to the idle level within 80 bit times after the last transition. The XMT, RCV, and COL pins are driven LOW during collision. |
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