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AME1086 Datasheet(PDF) 5 Page - Analog Microelectronics |
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AME1086 Datasheet(HTML) 5 Page - Analog Microelectronics |
5 / 14 page AME, Inc. 5 AME1086 1.5A Low Dropout Positive Voltage Regulator n n n n n Application Description 1. Output voltage adjustment Like most regulators, the AME1086 regulates the output by comparing the output voltage to an internally generated reference voltage. On the adjustable version, the VREF is available exter- nally as 1.25V between V OUT and ADJ. The voltage ratio formed by R1 and R2 should be set to conduct 10mA (minimum output load). The output voltage is given by the following equation: V OUT = VREF ( 1 + ) + I ADJ x R2 On fixed versions of AME1086, the voltage divider is provided internally. R2 R1 Figure 3 2. Thermal protection AME1086 has thermal protection which limits junction temperature to 150OC. However, de- vice functionality is only guaranteed to a maxi- mum junction temperature of +125OC. The power dissipation and junction temperature for AME1086 in TO-220 package are given by P D = (VIN - VOUT) x IOUT T JUNCTION = TAMBIENT + ( PD x θJA) Note: T JUNCTION must not exceed 125 O C 3. Current limit protection AME1086 is protected against overload condi- tions. Current protection is triggered at typi- cally 3.0A. 4. Stability and load regulation AME1086 requires a capacitor from VOUT to GND to provide compensation feedback to the inter- nal gain stage. This is to ensure stability at the output terminal. Typically, a 10 µF tantalum or 50 µF aluminum electrolytic is sufficient. Note: It is important that the ESR for this ca- pacitor does not exceed 0.5 Ω. The output capacitor dose not have a theoreti- cal upper limit and increasing its value will in- crease stability. COUT = 100 µF or more is typi- cal for high current regulator design. For the adjustable version, the best load regu- lation is accomplished when the top of the resistor divider (R1) is connected directly to the output pin of the AME1086. When so con- nected, R P is not multiplied by the divider ratio. For fixed output versions, the top of R1 is in- ternally connected to the output and ground pin can be connected to low side of the load. Figure 4 V OUT = V REF (1+ R2 R1 ) + I ADJ x R2 OUT ADJ IN V REF I AD J 50 µA V IN V OUT R1 R2 C 1 OUT ADJ IN V IN R1 R2 R L R P Parasitic Line Resistance Connect R2 to load (Connect R1 to case) |
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