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A43L8316 Datasheet(PDF) 2 Page - AMIC Technology |
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A43L8316 Datasheet(HTML) 2 Page - AMIC Technology |
2 / 45 page A43L8316 Preliminary 128K X 16 Bit X 2 Banks Synchronous DRAM Preliminary (April, 2000, Version 1.0) 1 AMIC Technology, Inc. Features n JEDEC standard 3.3V power supply n LVTTL compatible with multiplexed address n Dual banks / Pulse RAS n MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) n All inputs are sampled at the positive going edge of the system clock n Burst Read Single-bit Write operation n DQM for masking n Auto & self refresh n 16ms refresh period (1K cycle) n 50 Pin TSOP (II) General Description The A43L8316 is 4,194,304 bits synchronous high data rate Dynamic RAM organized as 2 X 131,072 words by 16 bits, fabricated with AMIC’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications. Pin Configuration n n TSOP (II) A43L8316V 50 49 48 47 46 45 44 43 42 41 39 40 38 37 36 35 34 33 32 31 30 29 28 27 26 1 2 3 4 5 6 7 8 9 10 12 11 13 14 15 16 17 18 19 20 21 22 23 24 25 |
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