SN75ALS174A

QUADRUPLE DIFFERENTIAL LINE DRIVER

SLLS122E – JULY 1991 – REVISED APRIL 1998

4

POST OFFICE BOX 655303

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VIK

Input clamp voltage

II = –18 mA

–1.5

V

VO

Output voltage

IO = 0

0

6

V

|VOD1|

Differential output voltage

IO = 0

1.5

6

V

|VOD2|

Differential output voltage

RL = 100 Ω

See Figure 1

1/2VOD1

or 2‡

V

OD2

g

RL = 54 Ω

g

1.5

2.5

5

|VOD3|

Differential output voltage

See Note 2

1.5

5

V

∆|VOD|

Change in magnitude of

differential output voltage§

RL = 54 Ω or 100 Ω,

See Figure 1

±0.2

V

VOC

Common-mode output voltage¶

RL = 54 Ω or 100 Ω,

See Figure 1

3

–1

V

∆|VOC|

Change in magnitude of

common-mode output voltage§

RL = 54 Ω or 100 Ω,

See Figure 1

±0.2

V

IO

Output current with power off

VCC = 0,

VO = –7 V to 12 V

±100

µA

IOZ

High-impedance-state output current

VO = –7 V to 12 V

±100

µA

IIH

High-level input current

VI = 2.7 V

20

µA

IIL

Low-level input current

VI = 0.4 V

–100

µA

IOS

Short-circuit output current

VO = –7 V to 12 V

±250

mA

ICC

Supply current (all drivers)

No load

Outputs enabled

36

55

mA

ICC

Supply current (all drivers)

No load

Outputs disabled

16

30

mA

† All typical values are at VCC = 5 V and TA = 25°C.

‡ The minimum VOD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater.

§

∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low

level.

¶ In ANSI Standard EIA/TIA-422-B, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage,

VOS.

NOTE 2: See EIA Standard RS-485, Figure 3-5, Test Termination Measurement 2.

switching characteristics over recommended ranges of supply voltage and operating free-air

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

td(OD) Differential output delay time

RL = 54 Ω,

See Figure 2

9

15

22

ns

tPZH

Output enable time to high level

RL = 110 Ω,

See Figure 3

30

45

70

ns

tPZL

Output enable time to low level

RL = 110 Ω,

See Figure 4

25

40

65

ns

tPHZ

Output disable time from high level

RL = 110 Ω,

See Figure 3

10

20

35

ns

tPLZ

Output disable time from low level

RL = 110 Ω,

See Figure 4

10

30

45

ns

† All typical values are at VCC = 5 V and TA = 25°C.