TMS27C256 32768 BY 8BIT UV ERASABLE

TMS27PC256 32768 BY 8BIT

PROGRAMMABLE READONLY MEMORIES

SMLS256H− SEPTEMBER 1984 − REVISED NOVEMBER 1997

7

POST OFFICE BOX 1443

recommended operating conditions

MIN

NOM

MAX

UNIT

VCC Supply voltage

Read mode (see Note 2)

4.5

5

5.5

V

VCC Supply voltage

SNAP! Pulse programming algorithm

6.25

6.5

6.75

V

VPP Supply voltage

Read mode

VCC −0.6

VCC+0.6

V

VPP Supply voltage

SNAP! Pulse programming algorithm

12.75

13

13.25

V

VIH

High-level dc input voltage

TTL

2

VCC+1

V

VIH

High-level dc input voltage

CMOS

VCC − 0.2

VCC+1

V

VIL

Low-level dc input voltage

TTL

− 0.5

0.8

V

VIL

Low-level dc input voltage

CMOS

− 0.5

0.2

V

TA

Operating free-air temperature

’27C256-_ _JL

’27PC256-_ _FML

0

70

°C

TA

Operating free-air temperature

’27C256-_ _JE

’27PC256-_ _FME

−40

85

°C

NOTE 2: VCC must be applied before or at the same time as VPP and removed after or at the same time as VPP. The device must not be inserted

into or removed from the board when VPP or VCC is applied.

electrical characteristics over recommended ranges of operating conditions

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VOH High-level dc output voltage

IOH = − 2.5 mA

3.5

V

VOH High-level dc output voltage

IOH = − 20 µA

VCC − 0.1

V

VOL

Low-level dc output voltage

IOL = 2.1 mA

0.4

V

VOL

Low-level dc output voltage

IOL = 20 µA

0.1

V

II

Input current (leakage)

VI = 0 V to 5.5 V

±1

µA

IO

Output current (leakage)

VO = 0 V to VCC

±1

µA

IPP1 VPP supply current

VPP = VCC = 5.5 V

1

10

µA

IPP2 VPP supply current (during program pulse)

VPP = 13 V

35

50

mA

ICC1

VCC supply current

TTL-input level

VCC = 5.5 V,

E = VIH

250

500

A

ICC1

VCC supply current

(standby)

CMOS-input level

VCC = 5.5 V,

E = VCC

100

250

µA

ICC2 VCC supply current (active)

VCC = 5.5 V,

E = VIL,

tcycle = minimum cycle time,

outputs open

15

30

mA

capacitance over recommended ranges of supply voltage and operating free-air temperature,

PARAMETER

TEST CONDITIONS

MIN

TYP‡

MAX

UNIT

Ci

Input capacitance

VI = 0,

f = 1 MHz

6

10

pF

Co

Output capacitance

VO = 0, f = 1 MHz

10

14

pF

† Capacitance measurements are made on a sample basis only.

‡ Typical values are at TA = 25°C and nominal voltages.