TMS27C256 32768 BY 8BIT UV ERASABLE

TMS27PC256 32768 BY 8BIT

PROGRAMMABLE READONLY MEMORIES

SMLS256H− SEPTEMBER 1984 − REVISED NOVEMBER 1997

10

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

Program

Verify

VIH

VIL

VIH /VOH

VIL /VOH

VPP‡

VCC

VCC‡

VCC

VIH

VIL

VIH

VIL

A0 − A14

VPP

VCC

E

G

tsu(A)

tsu(D)

ten(G)†

tdis(G)†

Data-In Stable

Data-Out Valid

tsu(VPP)

tsu(VCC)

th(D)

tsu(E)

tw(IPGM)

tsu(G)

Address Stable

Hi-Z

Address

N+1

DQ0 − DQ7

th(A)

† tdis(G) and ten(G) are characteristics of the device but must be accommodated by the programmer

‡ 13-V VPP and 6.5-V VCC for SNAP! Pulse programming

Figure 4. Program-Cycle Timing (SNAP! Pulse Programming)