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APC5830 Datasheet(PDF) 8 Page - Aplus Intergrated Circuits |
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APC5830 Datasheet(HTML) 8 Page - Aplus Intergrated Circuits |
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8 / 10 page  APLUS INTEGRATED CIRCUITS INC. APC5830 www.aplusinc.com.tw TEL : 886-2-2782-9266 8 3FEA : BANK REGISTER FOR COPROCESSOR. WRITE ONLY. 3FEB : BANK REGISTER MSB BIT FOR COPROCESSOR. WRITE ONLY. BANK REGISTER IS 9 BITS REGISTER($3FEB BIT0, $3FEA BIT7-0). THE MEMORY RANGE OF BANK IS FROM $4000 TO $7FFF. BIT 7-1 : RESERVED. 3FEC,3FED : TIMER A DATA OR TONE0 GENERATOR. READ AND WRITE. AFTER TIMER_A BE ENABLED , THE TIMER WILL START TO COUNT DOWN. WHEN TIMER COUNTS TO ZERO, THE TIMER WILL COUNT FROM THE INITIAL VALUE AND TIMER _A IRQ WILL BE HAPPEN. THE TIME ELAPSE = (($3FED,$3FEC)+1) / (TIMER A INPUT CLOCK). 3FEE : TIMER B LOW BYTE DATA. READ AND WRITE. 3FEF : TIMER B HIGH BYTE DATA. READ AND WRITE. AFTER TIMER_B BE ENABLED, THE TIMER WILL START TO COUNT DOWN. WHEN TIMER COUNTS TO ZERO ,THE TIMER WILL COUNT FROM THE INITIAL VALUE AND TIMER_B NMI WILL BE HAPPEN . THE TIME ELAPSE = (($3FEF,$3FEE)+1) / (TIMER B INPUT CLOCK). 3FF0 : PORT_A[15..8] DIRECTION REGISTER. WRITE ONLY. AN ‘1’ IN THIS REGISTER WILL SET THE CORRESPONDING PIN OF PORT_A TO BE OUTPUT. THE DEFAULT VALUE FOR EACH BIT IS ZERO. 3FF1 : PORT_A[15..8] DATA REGISTER. READ AND WRITE. 3FF2: PORT_B[11..8] DATA REGISTER. WRITE ONLY. BIT 3-0: PORT_B PIN 11 TO PIN 8. BIT 7-4 : RESERVED. 3FF4 : BANK REGISTER FOR CPU. WRITE ONLY. 3FF5 : BANK REGISTER MSB BIT FOR CPU. WRITE ONLY. BANK REGISTER IS 9 BITS REGISTER($3FF5 BIT0, $3FF4 BIT7-0). THE MEMORY RANGE OF BANK IS FROM $4000 TO $7FFF. BIT 1: RESERVED. BIT 2: = 1 VOICE0 BUFFER BE TRANSFERRED TO DAC PORT DIRECTLY.(DEFAULT) = 0 VOICE0 BUFFER WILL BE TRANSFERRED TO DAC PORT WHEN TIMER_B NMI HAPPEN. BIT 7-3 : RESERVED. |
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