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LM2623 Datasheet(PDF) 4 Page - Texas Instruments |
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LM2623 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 16 page LM2623 SNVS188G – MAY 2004 – REVISED DECEMBER 2005 www.ti.com ELECTRICAL CHARACTERISTICS Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range of −40°C to +85°C. Unless otherwise specified: VDD= VOUT= 3.3V. Symbol Parameter Condition Typ Min Max Units VDD_ST Start-Up Supply Voltage 25°C ILOAD = 0mA (1) 1.1 V VIN_OP Minimum Operating Supply ILOAD = 0mA 0.65 .8 V Voltage (once started) VFB FB Pin Voltage 1.24 1.2028 1.2772 V VOUT_MAX Maximum Output Voltage 14 V η Efficiency VIN = 3.6V; VOUT = 5V; ILOAD = 87 500mA % VIN = 2.5V; VOUT = 3.3V; ILOAD = 87 200mA D Switch Duty Cycle 17 % IDD Operating Quiescent Current (2) FB Pin > 1.3V; EN Pin at VDD 80 110 µA ISD Shutdown Quiescent Current (3) VDD, BOOT and SW Pins at 5.0V; 0.01 2.5 µA EN Pin <200mV ICL Switch Peak Current Limit LM2623A 2. 85 2.2 A IC Switch Peak Current Limit LM2623 1.2 A RDS_ON MOSFET Switch On Resistance 0.17 0.26 Ω θJA Thermal Resistance DGK Package, Junction to 240 °C/W Ambient(4) θJA Thermal Resistance WSON Package, Junction to 40 °C/W Ambient(4) (5) θJA Thermal Resistance WSON Package, Junction to 56 °C/W Ambient(4) (6) Enable Section VEN_LO EN Pin Voltage Low (7) 0.15VDD V VEN_HI EN Pin Voltage High (7) 0.7VDD V (1) VDD tied to Boot and EN pins. Frequency pin tied to VDD through 121K resistor. VDD_ST = VDD when startu-up occurs. VIN is VDD + D1 voltage (usually 10-50 mv at start-up) (2) This is the current into the VDD pin. (3) This is the total current into pins VDD, BOOT, SW and FREQ. (4) The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower. (5) Junction to ambient thermal resistance ( θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forthe in the JEDEC standard JESD51-17. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 3 x 2 array of thermal vias. The ground plane on the board is 50mm x 50 mm. Thickness of copper layers are 36mm/18mm/18mm/36mm (1.5oz/10z/1oz/1.5ox). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1W. (The DAP is soldered.) Fore more information on WSON thermal topics, as well as WSON mounting and soldering specifications please refer to (SNOA401) Application Note 1187 : Leadless Leadframe Package (LLP). (6) Exposed DAP soldered to an exposed 1sq. inch area of 1 oz. copper. Thermal resistance can be decreased by using more copper are to dissipate heat. (7) When the EN pin is below VEN_LO, the regulator is shut down; when it is above VEN_HI, the regulator is operating. 4 Submit Documentation Feedback Copyright © 2004–2005, Texas Instruments Incorporated Product Folder Links: LM2623 |
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