Duty Cycle =

LM27313

SNVS487D – DECEMBER 2006 – REVISED APRIL 2013

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Figure 13. Recommended PCB Component Layout

Some additional guidelines to be observed:

1. Keep the path between L1, D1, and C2 extremely short. Parasitic trace inductance in series with D1 and C2

will increase noise and ringing.

2. The feedback components R1, R2 and CF must be kept close to the FB pin of the LM27313 to prevent noise

injection on the high impedance FB pin.

3. If internal ground planes are available (recommended) use vias to connect directly to the LM27313 ground at

device pin 2, as well as the negative sides of capacitors C1 and C2.

SETTING THE OUTPUT VOLTAGE

The output voltage is set using the external resistors R1 and R2 (see Typical Application Circuits). A value of

13.3 k

Ω is recommended for R2 to establish a divider current of approximately 92 µA. R1 is calculated using the

formula:

(2)

DUTY CYCLE

The maximum duty cycle of the switching regulator determines the maximum boost ratio of output-to-input

voltage that the converter can attain in continuous mode of operation. The duty cycle for a given boost

application is defined as:

(3)

This applies for continuous mode operation.

The equation shown for calculating duty cycle incorporates terms for the FET switch voltage and diode forward

voltage. The actual duty cycle measured in operation will also be affected slightly by other power losses in the

circuit such as wire losses in the inductor, switching losses, and capacitor ripple current losses from self-heating.

Therefore, the actual (effective) duty cycle measured may be slightly higher than calculated to compensate for

these power losses. A good approximation for effective duty cycle is :

(4)

Where the efficiency can be approximated from the curves provided.

8

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