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MCF5274CVM166 Datasheet(PDF) 3 Page - Freescale Semiconductor, Inc |
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MCF5274CVM166 Datasheet(HTML) 3 Page - Freescale Semiconductor, Inc |
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3 / 44 page  Block Diagram MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4 Freescale Semiconductor 3 2 Block Diagram The superset device in the MCF5275 family comes in a 256 Mold Array Plastic Ball Grid Array (MAPBGA) package. Figure 1 shows a top-level block diagram of the MCF5275, the superset device. Figure 1. MCF5275 Block Diagram 3Features For a detailed feature list see the MCF5275 Reference Manual (MCF5275RM). 64 Kbytes SRAM (8Kx16)x4 EIM V2 ColdFire CPU INTC0 Watchdog PIT0 JTAG TAP CACHE (1Kx32)x4 PIT1 PIT2 PIT3 4 CH DMA UART 0 UART 1 I2C QSPI DTIM 0 DTIM 1 DTIM 2 DTIM 3 Timer PLL CLKGEN UART 2 16 Kbytes Edge Port SDRAMC CHIP EBI SELECTS (To/From PADI) (To/From PORTS CIM (GPIO) DIV EMAC DREQ[1:0] INTC1 Arbiter (To/From SRAM backdoor) (To/From Arbiter backdoor) SKHA RNGA MDHA Cryptography Modules DACK[3:0] (To/From INTC) PADI) JTAG_EN BS[3:2] PWMx USB FEC0 DTINx DTOUTx RXDx TXDx I2C_SDA I2C_SCL DDR QSPI RTSx CTSx D[31:16] A[23:0] R/W CS[3:0] TA TSIZ[1:0] TEA FEC1 JTAG_EN TRST TCLK TMS TDI TDO (To/From PADI) (To/From PADI) FAST ETHERNET CONTROLLER (FEC1) FAST ETHERNET CONTROLLER (FEC0) 4 CH PWM (To/From PADI) USB 2.0 Full Speed (To/From PADI) |
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Similar Description - MCF5274CVM166 |
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