NCP1605, NCP1605A, NCP1605B

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6

PIN FUNCTION DESCRIPTION

Pin

Number

Name

Function

1

STBY

An external signal (typically, a portion of the feedback signal of the downstream converter or a filtered

portion of the SMPS drive pulses) should be applied to Pin 1. When the Pin 3 voltage goes below

300 mV, the circuit enters a burst mode operation where the bulk voltage varies between the regulation

voltage and 95.5% of this level.

2

Brown−Out /

Inhibition

Ground Pin 6 to disable the part.

3

Soft−Start

The error amplifier output is available on this Pin. The capacitor connected between this pin and ground

adjusts the regulation loop bandwidth that is typically set below 20 Hz to achieve high Power Factor

ratios.

Pin 3 is grounded when the circuit is off so that when it starts operation, the power increases slowly

(soft−start).

4

Feedback

This pin receives a portion of the pre−converter output voltage. This information is used for the

output voltage drops below 95.5% of the wished level.

5

Current Sense

Input

This pin monitors a negative voltage proportional to the coil current. This signal is sensed to limit the

maximum coil current and detect the core reset (coil demagnetization).

6

Current Sense

Output

This pin sources the Pin 5 current. Place a resistor between Pin 6 and ground to build the voltage

proportional to the coil current and detect the core reset. The impedance between Pin 6 and ground

should not exceed 3 times that of the Pin 5 to ground. You can further apply the voltage from an

auxiliary winding to improve the valley detection of the MOSFET drain source voltage.

7

Ct

(Ramp)

The circuit controls the power switch on−time by comparing the Pin 7 ramp to an internal voltage

over the corresponding switching period).

Pin 7 sources a current proportional to the squared output voltage to allow the Follower Boost operation

(optional) where the PFC output voltage stabilizes at a level that varies linearly versus the ac line

amplitude. This technique reduces the difference between the output and input voltages, to optimize the

boost efficiency and minimize the size and cost of the PFC stage

8

Oscillator /

synchronization

Connect a capacitor or apply a synchronization signal to this pin to set the switching frequency. If the

coil current cycle is longer than the selected switching period, the circuit delays the next cycle until the

core is reset. Hence, the PFC stage can operate in CRM in the most stressful conditions.

9

GND

Connect this pin to the pre−converter ground.

10

Drive

The high current capability of the totem pole gate drive (+0.5/−0.8 A) makes it suitable to effectively

drive high gate charge power MOSFETs.

11

range is 10 V up to 20 V.

12

PfcOK / REF5V

The Pin 12 voltage is high (5 V) when the PFC stage is in a normal, steady state situation and low

otherwise. This signal serves to “inform” the downstream converter that the PFC stage is ready and

that hence, it can start operation.

13

STDWN

Apply a voltage higher than 2.5 V on Pin 13 to permanently shutdown the circuit. This pin can be used

to monitor the voltage across a thermistor in order to protect the application from an excessive heating

and/or to detect an overvoltage condition.

14

OVP / UVP

voltage exceeds 2.5 V (OVP).

15

NC

Creepage distance.

16

HV

Connect Pin 16 to the bulk capacitor. The internal startup current source placed between Pin 16 and the