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EELXT914PC-B3 Datasheet(PDF) 10 Page - Intel Corporation

Part # EELXT914PC-B3
Description  Intel짰 LXT914 Flexible Quad Ethernet Repeater
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

EELXT914PC-B3 Datasheet(HTML) 10 Page - Intel Corporation

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Intel® LXT914 Flexible Quad Ethernet Repeater
31-Oct-2005
Datasheet
Intel® LXT914 Flexible Quad Ethernet Repeater
10
Order Number: 248989, Revision: 003
Table 2.
Inter-Repeater Backplane Signal Descriptions
PLCC
PQFP
Symbol
I/O
Description
4
94
IRENA
I/O
Inter-Repeater Backplane Enable. This pin allows individual LXT914
repeaters to take control of the Inter-Repeater Backplane (IRB) data bus
(IRDAT). The IRENA bus must be pulled up locally by a 330
Ω resistor.1
5
95
IRDAT
I/O
IRB Data. This pin is used to pass data between multiple repeaters on the
IRB. The IRDAT bus must be pulled up locally by a 330
Ω resistor.1
6
96
IRDEN
O
IRB Driver Enable. The IRDEN pin is used to enable external bus drivers
which may be required in synchronous systems with large backplanes. This
is an active Low signal, maintained for the duration of the data
transmission. IRDEN must be pulled up locally by a 330
Ω resistor.
7
8
97
98
IRCFS
IRCOL
I/O
I/O
IRB Collision Flag Sense (IRCFS) and IRB Collision (IRCOL). These two
pins are used for collision signalling between multiple LXT914 devices on
the Inter-Repeater Backplane (IRB). Both the IRCFS bus and the IRCOL
bus must be pulled up globally with 330
Ω resistors. (IRCFS requires a
precision resistor [±1%].)2
NOTES:
1. IRENA and IRDAT can be buffered between boards in multi-board configurations. Where buffering is used,
a 330
Ω pull-up resistor can be used on each signal, on each board. Where no buffering is used, the total
impedance should be no less than 330
Ω.
2. IRCFS and IRCOL cannot be buffered. In multi-board configurations, the total impedance on IRCOL should
be no smaller than 330
Ω. IRCFS should be pulled up only once, by a single 330 Ω, 1% resistor.
Table 3.
Mode Select and Control Signal Descriptions
PLCC
PQFP
Symbol
I/O
Description
12
8
A/SYNC
I
Backplane Sync Mode Select. This pin selects the backplane sync mode.
When this pin is left floating an internal pull-up defaults to the
Asynchronous mode (A/SYNC High). In the asynchronous mode 12 or
more LXT914s can be connected on the backplane, and an external 10
MHz backplane clock source is not required. When the synchronous mode
is selected (A/SYNC tied Low), 32 or more LXT914s can be connected to
the backplane and an external 10 MHz backplane clock source is required.
13
9
LOC/EXT
I
Management Mode Select. This pin selects the management mode. When
this pin is left floating, an internal pull-up defaults to the Local management
mode (LOC/EXT High). In the Local mode, setup parameters are
downloaded from an EEPROM during initialization. Once initialized with the
setup parameters, the repeater functions independently.
28
33
LEDJM/
AUISEL
I/O
LED Driver or DTE/MAU Select. At reset, this pin selects the mode of the
AUI port. If left floating, an internal pull-down device forces the AUI port to
DTE mode. If pulled High with an external resistor, the port changes to a
MAU, in which case the functions of the LEDJM pin are disabled and the
default LED mode (Refer to Table 7) is not available.
—30
AUISEL
I
DTE/MAU Select. This pin changes the mode of the AUI port independent
of the condition at reset. This function is available only in the 100-pin PQFP
package.
17
35
14
40
LEDM0
LEDM1
I/O
I/O
LED Mode 0 & 1 Select. These two pins select one of four possible LED
modes of operation. The Functional Description section describes the four
modes.


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