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A3P1000L-FGG256 Datasheet(PDF) 29 Page - Microsemi Corporation |
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A3P1000L-FGG256 Datasheet(HTML) 29 Page - Microsemi Corporation |
29 / 242 page ProASIC3L Low Power Flash FPGAs Revision 13 2-13 Power Consumption of Various Internal Resources Table 2-18 • Different Components Contributing to Dynamic Power Consumption in ProASIC3L Devices at 1.2 V VCC Parameter Definition Device Specific Dynamic Power (µW/MHz) A3PE3000L A3P1000L A3P600L A3P250L PAC1 Clock contribution of a Global Rib 12.61 9.28 8.19 7.07 PAC2 Clock contribution of a Global Spine 2.66 1.59 1.19 1.01 PAC3 Clock contribution of a VersaTile row 0.56 0.52 PAC4 Clock contribution of a VersaTile used as a sequential module 0.07 PAC5 First contribution of a VersaTile used as a sequential module 0.05 PAC6 Second contribution of a VersaTile used as a sequential module 0.19 PAC7 Contribution of a VersaTile used as a combinatorial Module 0.11 PAC8 Average contribution of a routing net 0.45 PAC9 Contribution of an I/O input pin (standard-dependent) See Table 2-12 on page 2-9. through Table 2-14 on page 2-10. PAC10 Contribution of an I/O output pin (standard-dependent) See Table 2-15 on page 2-11 through Table 2-17 on page 2-12. PAC11 Average contribution of a RAM block during a read operation 25.00 PAC12 Average contribution of a RAM block during a write operation 30.00 PAC13 Dynamic contribution for PLL 1.74 Note: *For a different output load, drive strength, or slew rate, Microsemi recommends using the Microsemi power spreadsheet calculator or SmartPower tool in Libero SoC. |
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