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AS5134 Datasheet(PDF) 23 Page - ams AG |
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AS5134 Datasheet(HTML) 23 Page - ams AG |
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23 / 33 page  www.austriamicrosystems.com/AS5134 Revision 2.3 22 - 32 AS5134 Datasheet - Application In form atio n Figure 17. OTP Programming Connection Note: The maximum capacitive load at PROG in normal operation is less than 20pF. However, during programming the capacitors C1+C2 are needed to buffer the programming voltage during current spikes, but they must be removed for normal operation. To overcome this contradiction, the recommendation is to add a diode (4148 or similar) between PROG and VDD as shown in Figure 17 (special case setup), if the capacitors can not be removed at final assembly. Due to D1, the capacitors C1+C2 are loaded with VDD-0.7V at startup, hence not influencing the readout of the internal OTP registers. During programming the OTP, the diode ensures that no current is flowing from PROG (8-8.5V) to VDD (5V). In the standard case (see Figure 17), the verification of a correct OTP readout can be done either by analog readback of the OTP reg- ister or with the aid of the OTP_OK bit. The special case setup provides only the OTP_OK bit for verifying the correct reading of the OTP. Analog readback is not usable in the special case mode, as the diode pulls the PROG pin to VDD. The OTP_OK bit can be accessed with command #4 (see Table 9). As long as the PROG pin is accessible it is recommended to use standard setup. In case the PROG pin is not accessible at final assembly, the special setup is recommended. 8.1.2 Programming Verification After programming, the programmed OTP bits must be verified in two ways: Digital Read Out (Mandatory): After sending a READ OTP command, the readback information must be the same as programmed information. Otherwise, it indicates that the programming was not performed correctly. Note: Either “Digital Verification” or “Analog Verification” must be carried out in addition to the “Digital Read Out”. Digital Verification: Checking the OTP_OK bit (0 = OK, 1 = error) i) At room temperature ii) Right after the programming Analog Verification: By switching into Extended Mode and sending a READ ANA command, the pin PROG becomes an output sending an analog voltage with each clock representing a sequence of the bits in the OTP register (starting with D61). A voltage of <500mV indicates a correctly programmed bit (“1”) while a voltage level between 2V and 3.5V indicates a correctly unprogrammed bit (“0”). Any voltage level in between indicates incorrect programming. VDD VSUPPLY PROG GND C1 C2 100nF 10µF Vzapp Vprog PROM Cell maximum parasitic cable inductance L<50nH Standard Case VDD VSUPPLY PROG GND C1 C2 100nF 10µF Vzapp Vprog PROM Cell L<50nH Special Case Remove for normal operation |
Similar Part No. - AS5134_04 |
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Similar Description - AS5134_04 |
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